Other Parts Discussed in Thread: SYSCONFIG
Hello,
my purpose, is to read frequency and duty cycle of input PWM signal. When duty cycle of input signal is 50%, the frequency is read correctly. But when i'm setting 75% of duty cycle, the frequency is changed, unlike DC.
Example : I had 1800hz with 50% of DC of input signal. When 75% of DC for input signal was set. The frequency was changed to 3600 hz, DC was unchanged.
I'm using the following equation to calculate this params:
DebugP_log("freq! %d\r\n", 1000000000/(5*(cap1Count- cap2Count)+5*(cap1Count- cap3Count)));//miliseconds
DebugP_log("duty! %d%'%'\r\n", 100*5*(cap1Count- cap2Count)/(5*(cap1Count - cap3Count) + 5 * (cap1Count - cap4Count)));
Settings are the same as for ecap_capture_pwm project.
Ecap timestamps were setted in the interrupt
static void App_ecapIntrISR(void *handle)
{
volatile uint16_t status;
status = ECAP_getInterruptSource(gEcapBaseAddr);
if(status & ECAP_ISR_SOURCE_CAPTURE_EVENT_4)
{
// Get the capture counts. Each capture should be 4x the ePWM count
// because of the ePWM clock divider.
cap1Count = ECAP_getEventTimeStamp(gEcapBaseAddr, ECAP_EVENT_1);
cap2Count = ECAP_getEventTimeStamp(gEcapBaseAddr, ECAP_EVENT_2);
cap3Count = ECAP_getEventTimeStamp(gEcapBaseAddr, ECAP_EVENT_3);
cap4Count = ECAP_getEventTimeStamp(gEcapBaseAddr, ECAP_EVENT_4);
SemaphoreP_post(&gEcapSyncSemObject);
}
return;
}
What I see on logic analyzer.
