Hello all. According to the docs for the C6748, the SPI clock can run from sysclk2/3 to sysclk2/256. That implies the slowest clock rate for a 6748 running at 300MHz would be about 150M/256 ~ 586kHz if I understand correctly?
I have a peripheral that can handle 80kHz max clock rate on the SPI. Does anyone know of a workaround for this, or perhaps some other way to scale the SPI clock frequency?
I guess I could write some code that makes the GPIO pins emulate a SPI bus, but I would rather not if someone knows another way.
Thanks
