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Reducing Slew rate for GPIO I/O

Hi,

i am using TI-C6452 DSP. The DSP has the peripherals FPGA ,DDR2. I want to reduce the slew rate or driver strength to control the GPIO I/O, especially for EMIF.Do some one know any bit corresponding to slew rate or driver strength in any of the doc's? or is there any method to do it?

 

Regards.