why dm365 resizer cost so much time

Hi,

Can you please check the clock multiplier and divider in the IPIPEIF which controls the RSZ clock. Can you tell me the CLKDIV registers M and N value from IPIPEIF module? I assume you are using RSZ in single shot mode.

Regards,

Anshuman

PS: Please mark this post as verified, if you think it has answered your question. Thanks.

Hi, Anshuman

       Thank you for you reply.

       As you said I used RSZ in single shot mode and did not configurate anything about IPIPEIF, I set the RSZ input parameters prm.clkDidM = 10 and prm.clkDivN = 80. How to configurate the clock multiplier and divider for IPIPEIF ?

Regards.

Shmily. 

shmily said:

I set the RSZ input parameters prm.clkDidM = 10 and prm.clkDivN = 80. How to configurate the clock multiplier and divider for IPIPEIF ?

I actually meant these values only. In the VPFE Programmers guide, you can find that the actual registers are in IPIPEIF and the clock for RSZ is geenrated from IPIPEIF. Anyways, having said that, i can see you are setting M/N = 1/8. This seems to be correct. Can you tell me what is the DDR frequency in your case?

Assuming DDR is 270MHz, RSZ clock is 270*1/8 = 33.75MHz. Your input frame is 640x480 and hence it should take 640*480 / 33.75MHz = 9msec.

There could be possibly few problems now:

1. You might have set blanking to be pretty high. Actually, blanking duration is also counted in the completion of RSZ operation. Assuming you set PPLN as W and LPFR as H for your resize operation, then time taken is W*H/33.75MHz. If your W and H are significantly large, you can see a 50ms kind of time. Can you check PPLN and LPFR that you are setting for resize configuration?

2. Are you profiling this 50ms just across the RSZ_RESIZE ioctl? Can your thread doing the resize operation be context switched out?

3. Put clkDivN to say 60 and see if you are getting an improvement. If yes, let me know the time it takes and we can try to find out the correlation of the input size with the clock.

Regards,

Anshuman

PS: Please mark this post as verified, if you think it has answered your question. Thanks.

Hi,

      DDR and the other infomation listed below. DDR is 243MHz.
      PPLN and LPFR both equal zero which can be found in rsz_init(), and I did not set them in anywhere other.   
     Additional, follwing data is the test result:
    640x480   rsz to 800x480   26.30ms     M/N = 1/8
    640x480   rsz to 800x480   26.05ms     M/N = 1/4 (1/6)
    1280x960  rsz to 800x480   99.7ms      M/N = 1/8
    1280x960  rsz to 800x480   68.8ms      M/N = 1/4

 PLL1 Settings,
 PLLM    = 0x00000051
 PREDIV  = 0x00000007
 POSTDIV = 0x00000000
 PLLDIV1 = 0x00000000
 PLLDIV2 = 0x00000001
 PLLDIV3 = 0x00000001
 PLLDIV4 = 0x00000003
 PLLDIV5 = 0x00000001
 PLLDIV6 = 0x00000011
 PLLDIV7 = 0x00000000
 PLLDIV8 = 0x00000003
 PLLDIV9 = 0x00000001
 
 PLL2 Settings,
 PLLM    = 0x00000063
 PREDIV  = 0x00000007
 POSTDIV = 0x00000000
 PLLDIV1 = 0x00000000
 PLLDIV2 = 0x00000001
 PLLDIV3 = 0x00000000
 PLLDIV4 = 0x0000001c
 PLLDIV5 = 0x00000007
 PLLDIV6 = 0x00000000
 PLLDIV7 = 0x00000000
 PLLDIV8 = 0x00000000
 PLLDIV9 = 0x00000000
 
 PERICLK = 0x243f04fc
 VPSSCLK = 0x00000018
 
 CLK Hz,
 ARM   Hz =  297000000
 DDR   Hz =  243000000
 VPSS  Hz =  243000000
 IMCOP Hz =  243000000

  Regards.
  Shmily.

Can you please dump the IPIPEIF and RSZ registers and share the details?

Regards,

Anshuman