SK-AM62: Debugging SPL in CCS

Govindaraji Sivanantham

Part Number: SK-AM62
Other Parts Discussed in Thread: AM625

Hello TI,

I am trying to load the u-boot spl from CCS and i referred below link

https://software-dl.ti.com/processor-sdk-linux/esd/AM62X/08_06_00_42/exports/docs/linux/Foundational_Components/U-Boot/Apps-SPL-Debug.html

In above link had a broken link of compiling methods of u-boot from CCS, please provide the working link of compilation methods of u-boot from CCS.

however i tried loading r5 spl by compiling outside of CCS, but not helping to debugging spl code.

additionally here few steps are not documented like how to load a53 spl and u-boot.img once r5 spl loaded. please provide document for it.

u-boot porting also i referred from resource explorer https://dev.ti.com/tirex/explore/node?node=A__ANjtmn.T3uPBiF9U2lCRWQ__linux_academy_am62x__XaWts8R__LATEST

but this page also not explained about loading spl from CCS.

we have to do our custom am62 board u-boot porting,

Please provide necessary document to debug the spl(r5, a53), u-boot.img from CCS.

over 2 years ago

0 Swargam Anil over 2 years ago

TI__Mastermind 45916 points

Hello Shiva,

I am assigning this thread to an expert, and you may get a reply in one or two days.

Regards,

S.Anil.

0 Judith Mendez over 2 years ago

TI__Expert 8480 points

Hi,

We understand there is not good documentation on debugging for AM62x devices. Sorry about that inconvenience. For the moment, let me share a method that works for debugging R5 SPL or A53 SPL.

Rebuild U-boot for AM62x. But in the following file:

<path-to-u-boot>/arch/arm/mach-k3/am625_init.c and in the following function:

void board_init_f(ulong dummy)

add a while loop that is gated by a CONFIG option depending on what core you are trying to debug.

If you want to debug at a53 stage add:

#ifdef CONFIG_ARM64
//while loop
#endif

Boot the board with the newly built images.

Then you can start CCS, attach to the A53 core, and jump to PC+1 to break out of while loop and start debugging A53 SPL on A53 core.

~ Judith

0 Govindaraji Sivanantham over 2 years ago in reply to Judith Mendez

Intellectual 900 points

Hi Judith,

Thank you for your short answer, but here i have few questions about loading spl(r5,- a53), u-boot.img

1. compiling the u-boot for debugging spl in CCS

Since compilation methods provided in debugging spl in CCS page, How would you recommend to compile(compile using 3.1.1.1.2. Build U-Boot?)

2. loading spl in r5 core from CCS

which binary file i need builddir/r5/spl/u-boot.spl or builddir/r5/tiboot3.bin?

Steps with screenshot might be helpful for us to debug

3. loading spl in a53 core from CCS

which binary file i need builddir/a53/spl/u-boot.spl or builddir/a53/tispl.bin?

and when i am able to load spl to a53 core, since i am very new for arm64 CCS loading

Steps with screenshot might be helpful for us to debug

4. loading u-boot.img in a53 core from CCS

Steps with screenshot might be helpful for us to debug

Kindly Provide necessary information, Thanks in advance :-)

0 Judith Mendez over 2 years ago in reply to Govindaraji Sivanantham

TI__Expert 8480 points

Hi,

Since I do not have screenshots or steps at hand, I will go through the process and post here soon.

~ Judith

0 Govindaraji Sivanantham over 2 years ago in reply to Judith Mendez

Intellectual 900 points

Hi Judith,

Shall I have steps to debug spl from CCS?

0 Judith Mendez over 2 years ago in reply to Govindaraji Sivanantham

TI__Expert 8480 points

Hi,

Yes, I will post here in a few hours

~ Judith

0 Judith Mendez over 2 years ago in reply to Judith Mendez

TI__Expert 8480 points

1. Rebuild U-boot with the following patch:
diff --git a/arch/arm/mach-k3/am625_init.c b/arch/arm/mach-k3/am625_init.c
index 4f54eeff82..58ee86488f 100644
--- a/arch/arm/mach-k3/am625_init.c
+++ b/arch/arm/mach-k3/am625_init.c
@@ -133,6 +133,11 @@ void board_init_f(ulong dummy)
        rtc_erratumi2327_init();
#endif

+#if defined(CONFIG_CPU_V7R)
+       volatile int i = 1;
+       while (i);
+#endif
+
        /*
         * Cannot delay this further as there is a chance that
         * K3_BOOT_PARAM_TABLE_INDEX can be over written by SPL MALLOC section

#Use CONFIG_ARM64 to debug A53 SPL

2. Boot the board with the new images built with the previous step. If using SD card boot method, in the first partition "boot" of the SD card, we will replace the 'tiboot3.bin', 'tispl.bin', and 'u-boot.img' with the binary files that we build using U-boot source code.

3. Connect USB Type-C cable to J11 to power the board. Connect 1 Micro USB cable to the board and host PC that will run CCS debugger.

4. Launch CCS

5. Launch target configuration for AM62x
    - View → Target Configurations
    - Right click on 'User Defined' folder
    - Select ‘New Target Configuration’
    - Name the target configuration file

    - Select ‘Finish'

6. Test connection
    - On the General Setup view
    - Connection: Texas Instruments XDS110 USB Debug Probe'
    - Select 'AM62; for 'Board or Device' option. Not 'Am62x_SK_EVM'
    - Save the Target Configuration
    - Test the Connection

7. Launch the Target Configuration
    - On the Target Configurations view
    - Right click your new Target configuration
    - Launch Selected Configuration
    - To Debug R5: Right click the R5 core Cortex_R5_0_0. To debug A53 core: Right click the A53 core CortexA53_0
    - Select 'Connect Target'


8. In the Registers view, unset Core Registers -> CPSR -> T


9. Load symbols
    - using the file icon on the menu bar that has down arrow
    - Select Load Symbols

    - Look for the u-boot-spl file. You needed to have built R5 SPL in U-boot source. Mine is found in <path-to-ti-u-boot>/out/r5/spl/u-boot-spl. Select the file.

10. Debug
    - We can now see the loop that we added
    - As per disassembly view, variable 'i' is stored in R4, Set R4 register to 0

    - Use the Disassembly view to go to another function or piece of code that can be executed further down

    - Click on 'Assembly Step Over' to go through the code


Notice this info is not found in official TI documentation. There is already a ticket in record for one of our engineers to create the official documentation for debugging R5 SPL and A53 SPL for K3 devices.

~ Judith