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PROCESSOR-SDK-J721E: PSI-L threads for CPSW9

wen f
Prodigy 245 points

Part Number: PROCESSOR-SDK-J721E

Hi,

In csl_psilcfg_thread_map.h, there are 8 tx threads and 1 rx thread for CPSW9:

#define CSL_PSILCFG_NAVSS_MAIN_CPSW9_PSILS_THREAD_OFFSET (0x4A00U)
#define CSL_PSILCFG_NAVSS_MAIN_CPSW9_PSILS_THREAD_CNT (1U)
#define CSL_PSILCFG_NAVSS_MAIN_CPSW9_PSILD_THREAD_OFFSET (CSL_PSILCFG_DEST_THREAD_OFFSET | CSL_PSILCFG_NAVSS_MAIN_CPSW9_PSILS_THREAD_OFFSET)
#define CSL_PSILCFG_NAVSS_MAIN_CPSW9_PSILD_THREAD_CNT (8U)
However, according to the description of Technical Reference Manual (figure 12-166), I think there should be more tx and rx threads.
 
if there is only 1 rx thread, CPSW9 can only be used by a single core. Is it correct? 

Thanks,

Wen