I have used Intel 80188 processor in my schooling time and the architecture of Intel 80188 is quite different from C6672. Maybe due to its simplified interface.
In 80188, there are address, data, and control lines coming out of a processor. Hence, all the peripheral that I want to control (using the 80188), I will connect the address or Chip Select, data, and control line to the peripherals.
in C6672, there are no generic address, data and control lines. What are available are specific module address, data and control lines (such as DDR and EMIF16). This results in more pins on the C6672 (841pins compared to 68 pins on the 80188)?
Just to confirm my understanding, the reason for the 2 different architecture is due to the frequency of operation of the 2 processors (c6672 and 80188). 80188 uses a bus architecture and a particular address will activate only 1 peripheral, whereas c6672 uses a point-to-point architecture. For example, c6672 has dedicated lines running to DDR3 RAM, and dedicated lines running to EMIF16 nand rom. This will minimize chances of error data writing to the DDR3 SDRAM chips when the processor is accessing the flash ROM? Or is it due to the need to do pipelining, the c6672 can write to the DDR3 SDRAM at the same time as reading from the flash rom?
Another implementation question is:
Is there a external bus (with address, data, control lines) for the c6672 that I could use to control other peripherals (like LED, keypad, UART, PPI, LCD)?