TDA4VE-Q1: how to mapping ISR SOURCE for IPC mailbox

ping li

Prodigy 90 points

Part Number: TDA4VE-Q1

Hello,Ti:

I used J721S2 chip,I try to use IPC to send message.

1、MCU2_1->MCU1_0

I set MCU1_0 IRQ code(from ti demo)

MCU1_0 can receive MCU2_1 Message

2、MCU10->MCU2_1

MCU2_1 can receive MCU1_0 Message,NO 225 INT RESOURCE IRQ ?

3，how to mapping INT/IRQ for mailbox?

mailbox0 MCU21->MCU10

CLST7_USER0->IN_INTR[408]->INTR_ROUTER0

INTR_ROUTER0

OUTL_INTR[401]->337

INTR_ROUTER0_OUTL_INTR[407:400]

MCU_R5FSS0(core0 /core1)

CORE0/1_INTR_IN_[383:376]

mailbox 0 mcu10-> Mcu21

CLST5_USR2->IN_INTR[418]

INTR_ROUTER0

OUTL_INTR[225]->225

INTR_ROUTER0_OUTL_INTR[255:224]

R5FSS0_CORE1

CORE1_INTR_IN_[255:224]

I do not konw IN_INTR mapping to OUTL_INTR?

can you help me?

over 2 years ago

0 Tarun Mukesh Puvvada over 2 years ago

TI__Mastermind 49776 points

Hello,

May i know which SDK version you are using ? Are you using CDD IPC ? and which example application are you running here ?

Regards

Tarun Mukesh

0 ping li over 2 years ago in reply to Tarun Mukesh Puvvada

Prodigy 90 points

hello,

I use SDK version is 8.4,MCU1_0 and MCU2_0 all used PDK,not use CDD IPC,I write a RPMessage_send in 10ms cycle task.it is same code in MCU1_0 and MCU2_1

0 Tarun Mukesh Puvvada over 2 years ago in reply to ping li

TI__Mastermind 49776 points

Sorry , I exactly didn't get your point here.

You are able to receive messages and what is the issue ?

For 225 interrupt there is no pre defined macro is what you are asking ?

Regards

Tarun Mukesh

0 Tarun Mukesh Puvvada over 2 years ago in reply to Tarun Mukesh Puvvada

TI__Mastermind 49776 points

The interrupt routing will be done accordingly .

For you i have highlighted here,

Regards

Tarun Mukesh

0 ping li over 2 years ago in reply to Tarun Mukesh Puvvada

Prodigy 90 points

likes,CLST7_USER0->NAVSS IN_INTR[408] ，how to trigger NAVSSOUTL_INTR[401]->MCU1_0 IN_INTR[337]?

0 ping li over 2 years ago in reply to Tarun Mukesh Puvvada

Prodigy 90 points

INTRTR_CFG_MBX_CLST5_USR2_418_MCU_1_0_TO_MCU_2_1_225

0 Tarun Mukesh Puvvada over 2 years ago in reply to ping li

TI__Mastermind 49776 points

Hello,

Mailbox allocation is explained here in the FAQ https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1238685/faq-tda4vm-explain-ipc-mailbox-allocation

Based on the cluster and queue

We have a local interrupt and it will be sent to Interrupt router based on the core to be sent out of 32 interrupts (see the interrupt router screenshot highlighted above) the free output interrupt will be selected so that it will not conflict with others.

Thanks

Tarun Mukesh

0 ping li over 2 years ago in reply to Tarun Mukesh Puvvada

Prodigy 90 points

in mailbox，get a IRQ, but i do not get response in MCU2_1

0 Tarun Mukesh Puvvada over 2 years ago in reply to ping li

TI__Mastermind 49776 points

Hi ,

Can you start checking any free interrupt from INTR_ROUTER0_OUTL_INTR[255:228] (228 instead of 224) to CORE1_INTR_IN_[255:228] (228 INSTEAD OF 224) ?

Intiial 4 --> 224 to 228 are reserved for sys firmware

Regards

Tarun Mukesh

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TDA4VE-Q1: how to mapping ISR SOURCE for IPC mailbox