Hi,
Our custom board will use UART1 as a serial console.
We have made the following changes in our SDK(08_06_01_02), but there is still no any output from the console.
Please help to confirm whether there is anything else that needs to be modified when changing the serial console to UART1?
diff --git a/arch/arm/dts/k3-j721s2-common-proc-board-u-boot.dtsi b/arch/arm/dts/k3-j721s2-common-proc-board-u-boot.dtsi
index c44d167b5f..5e92ea3135 100644
--- a/arch/arm/dts/k3-j721s2-common-proc-board-u-boot.dtsi
+++ b/arch/arm/dts/k3-j721s2-common-proc-board-u-boot.dtsi
@@ -12,7 +12,7 @@
aliases {
serial0 = &wkup_uart0;
serial1 = &mcu_uart0;
- serial2 = &main_uart8;
+ serial2 = &main_uart1;
i2c0 = &wkup_i2c0;
i2c1 = &mcu_i2c0;
i2c2 = &mcu_i2c1;
};
+&main_uart1_pins_default {
+ u-boot,dm-spl;
+};
+
+&main_uart1 {
+ u-boot,dm-spl;
+};
+
diff --git a/arch/arm/dts/k3-j721s2-common-proc-board.dts b/arch/arm/dts/k3-j721s2-common-proc-board.dts
index 5b7e33490f..453a4d54d1 100644
--- a/arch/arm/dts/k3-j721s2-common-proc-board.dts
+++ b/arch/arm/dts/k3-j721s2-common-proc-board.dts
@@ -18,11 +18,12 @@
chosen {
stdout-path = "serial2:115200n8";
- bootargs = "console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x2880000";
+ //bootargs = "console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x2880000";
+ bootargs = "console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x2810000";
};
aliases {
- serial2 = &main_uart8;
+ serial2 = &main_uart1;
mmc0 = &main_sdhci0;
mmc1 = &main_sdhci1;
can0 = &main_mcan16;
@@ -128,6 +129,13 @@
>;
};
+ main_uart1_pins_default: main-uart1-pins-default {
+ pinctrl-single,pins = <
+ J721S2_IOPAD(0x054, PIN_INPUT, 11) /* (Y27) MCASP2_ACLKX.UART1_RXD */
+ J721S2_IOPAD(0x058, PIN_OUTPUT, 11) /* (AA27) MCASP2_AFSX.UART1_TXD */
+ >;
+ };
+
&main_uart1 {
- status = "disabled";
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&main_uart1_pins_default>;
+ /* Shared with TFA on this platform */
+ power-domains = <&k3_pds 350 TI_SCI_PD_SHARED>;
};
diff --git a/arch/arm/dts/k3-j721s2-r5-common-proc-board.dts b/arch/arm/dts/k3-j721s2-r5-common-proc-board.dts
index 086f6da06c..9564460f14 100644
--- a/arch/arm/dts/k3-j721s2-r5-common-proc-board.dts
+++ b/arch/arm/dts/k3-j721s2-r5-common-proc-board.dts
@@ -12,7 +12,7 @@
/ {
chosen {
firmware-loader = &fs_loader0;
- stdout-path = &main_uart8;
+ stdout-path = &main_uart1;
tick-timer = &timer1;
};
@@ -106,6 +106,16 @@
>;
};
+ main_uart1_pins_default: main-uart1-pins-default {
+ pinctrl-single,pins = <
+ J721S2_IOPAD(0x054, PIN_INPUT, 11) /* (Y27) MCASP2_ACLKX.UART1_RXD */
+ J721S2_IOPAD(0x058, PIN_OUTPUT, 11) /* (AA27) MCASP2_AFSX.UART1_TXD */
+ >;
+ };
+
+&main_uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&main_uart1_pins_default>;
+};
diff --git a/arch/arm/mach-k3/j721s2/clk-data.c b/arch/arm/mach-k3/j721s2/clk-data.c
index 0c5c321c1e..65f7f322f4 100644
--- a/arch/arm/mach-k3/j721s2/clk-data.c
+++ b/arch/arm/mach-k3/j721s2/clk-data.c
@@ -247,6 +247,7 @@ static const struct clk_data clk_list[] = {
CLK_MUX("emmcsd1_lb_clksel_out0", emmcsd1_lb_clksel_out0_parents, 2, 0x1080b4, 16, 1, 0),
CLK_MUX("mcu_clkout_mux_out0", mcu_clkout_mux_out0_parents, 2, 0x40f08010, 0, 1, 0),
CLK_DIV_DEFFREQ("usart_programmable_clock_divider_out0", "hsdiv4_16fft_main_1_hsdivout0_clk", 0x1081c0, 0, 2, 0, 0, 48000000),
+ CLK_DIV("usart_programmable_clock_divider_out1", "hsdiv4_16fft_main_1_hsdivout0_clk", 0x1081c4, 0, 2, 0, 0),
CLK_DIV("usart_programmable_clock_divider_out5", "hsdiv4_16fft_main_1_hsdivout0_clk", 0x1081d4, 0, 2, 0, 0),
CLK_DIV("usart_programmable_clock_divider_out8", "hsdiv4_16fft_main_1_hsdivout0_clk", 0x1081e0, 0, 2, 0, 0),
CLK_DIV("hsdiv0_16fft_main_12_hsdivout0_clk", "pllfracf2_ssmod_16fft_main_12_foutvcop_clk", 0x68c080, 0, 7, 0, 0),
@@ -384,6 +385,10 @@ static const struct dev_clk soc_dev_clk_data[] = {
DEV_CLK(223, 3, "gluelogic_hfosc0_clkout"),
DEV_CLK(223, 4, "k3_pll_ctrl_wrap_wkup_0_chip_div1_clk_clk"),
DEV_CLK(223, 5, "board_0_wkup_i2c0_scl_out"),
+
+ DEV_CLK(350, 2, "k3_pll_ctrl_wrap_main_0_chip_div1_clk_clk"),
+ DEV_CLK(350, 3, "usart_programmable_clock_divider_out1"),
+
DEV_CLK(354, 2, "k3_pll_ctrl_wrap_main_0_chip_div1_clk_clk"),
DEV_CLK(354, 3, "usart_programmable_clock_divider_out5"),
DEV_CLK(357, 2, "k3_pll_ctrl_wrap_main_0_chip_div1_clk_clk"),
@@ -398,9 +403,18 @@ static const struct dev_clk soc_dev_clk_data[] = {
DEV_CLK(360, 23, "k3_pll_ctrl_wrap_main_0_chip_div1_clk_clk"),
};
- const struct ti_k3_clk_platdata j721s2_clk_platdata = {
- .clk_list = clk_list,
- .clk_list_cnt = 105,
- .soc_dev_clk_data = soc_dev_clk_data,
- .soc_dev_clk_data_cnt = 124,
- };
+const struct ti_k3_clk_platdata j721s2_clk_platdata = {
+ .clk_list = clk_list,
+ .clk_list_cnt = 106,
+ .soc_dev_clk_data = soc_dev_clk_data,
+ .soc_dev_clk_data_cnt = 126,
+};
diff --git a/arch/arm/mach-k3/j721s2/dev-data.c b/arch/arm/mach-k3/j721s2/dev-data.c
index 35e8b17eb1..93a1e416bf 100644
--- a/arch/arm/mach-k3/j721s2/dev-data.c
+++ b/arch/arm/mach-k3/j721s2/dev-data.c
@@ -67,13 +67,14 @@ static struct ti_dev soc_dev_list[] = {
PSC_DEV(99, &soc_lpsc_list[12]),
PSC_DEV(98, &soc_lpsc_list[13]),
PSC_DEV(146, &soc_lpsc_list[14]),
+ PSC_DEV(350, &soc_lpsc_list[15]),
PSC_DEV(354, &soc_lpsc_list[15]),
PSC_DEV(357, &soc_lpsc_list[15]),
PSC_DEV(4, &soc_lpsc_list[16]),
PSC_DEV(202, &soc_lpsc_list[17]),
PSC_DEV(203, &soc_lpsc_list[18]),
};
- const struct ti_k3_pd_platdata j721s2_pd_platdata = {
- .psc = soc_psc_list,
- .pd = soc_pd_list,
- .lpsc = soc_lpsc_list,
- .devs = soc_dev_list,
- .num_psc = 2,
- .num_pd = 6,
- .num_lpsc = 19,
- .num_devs = 25,
- };
+const struct ti_k3_pd_platdata j721s2_pd_platdata = {
+ .psc = soc_psc_list,
+ .pd = soc_pd_list,
+ .lpsc = soc_lpsc_list,
+ .devs = soc_dev_list,
+ .num_psc = 2,
+ .num_pd = 6,
+ .num_lpsc = 19,
+ .num_devs = 26,
+};
