Part Number: TDA4VM
Hello TI,
we want configure the PMU of one R5F core to generate an interrupt for one of the event counters.
In the ARM Cortex-R5 reference manual it is described how to configure the interrupts, there is one for each of the 3 PMU event counters. But there is also the following note:
In the TDA4VM TRM I did not find any PMUIRQ signals, only the following two:
I have several questions about this:
1) How is the mapping between the 3 ARM defined interrupt signals and the one mentioned in the TDA4VM TRM?
Is xxx_COREx_PMU_0 an or’ed signal of the 3 ARM signals? Or is only the first one routed out of the R5F? Or is it something totally different?
2) Assuming that the R5F PMU IRQ output is related to what we need: how can I route it to the VIM of the R5F to trigger an interrupt there?
As far as I now, GIC interrupts are only routed to the A72. And in the list of VIM interrupt sources I did not find any PMU interrupt.
3) If the interrupt need to be routed from R5F over GIC to VIM, maybe through another interrupt router, how large will be the interrupt latency?
Regards
Thomas
