TDA4VM: DM timer period is not accuracy

Hello Champs,

Any suggestion on this issue is appreciated.

Thanks
Regards
Shine

Hi Shine,

Apologies for delay in response.

Are they referring to any existing example. If yes, can you please share the changes that they have made so I can reproduce this error on my end?

Regards,
Parth

Hi Parth,

Thank you very much. 

/*
* \brief Main file for TI-RTOS build
*/

/* ========================================================================== */
/* Include Files */
/* ========================================================================== */

#include <ti/csl/arch/csl_arch.h>
#include <ti/csl/soc.h>
#include <ti/csl/cslr.h>

#include <ti/osal/osal.h>
#include <ti/osal/TaskP.h>

#if (defined (BUILD_MCU1_0) && (defined (SOC_J721E) || defined (SOC_J7200)))
#include <ti/drv/sciclient/sciserver_tirtos.h>
#endif
#include <ti/drv/ipc/include/ipc_rsctypes.h>

#include <Adc.h>

#include "AdcApp.h"
#include "string.h"
#include "app_utils.h"
#include "AdcApp_Startup.h"
#include <ti/board/board.h>
#include <ti/drv/sciclient/sciclient.h>

#include <ti/kernel/freertos/FreeRTOS-LTS/FreeRTOS-Kernel/include/FreeRTOS.h>
#include <ti/kernel/freertos/FreeRTOS-LTS/FreeRTOS-Kernel/include/task.h>
#include <ti/drv/sciclient/sciclient.h>
#include <ti/drv/sciclient/sciserver_tirtos.h>
#include "Dio.h"

#include "pmic_app.h"
#include "pmic_common.h"
#include "ipc_trace.h"
#include <ti/csl/arch/r5/csl_arm_r5.h>

/* ========================================================================== */
/* Macros & Typedefs */
/* ========================================================================== */

/* Test application stack size */
#define APP_TASK_STACK (10U * 1024U)
/**< Stack required for the stack */
/**< Task name */
#define APP_TSK_STACK_MAIN (32U * 1024U)
/**< Test application stack size */
#define IPC_INIT_SCISERVER_TASK_PRI (12)
#define APP_SCISERVER_INIT_TSK_STACK (32U * 1024U)
/* High Priority for SCI Server - must be higher than Low priority task */
#define IPC_SETUP_SCISERVER_TASK_PRI_HIGH (8)
/*
* Low Priority for SCI Server - must be higher than IPC echo test tasks
* to prevent delay in handling Sciserver requests when test is performing
* multicore ping/pong.
*/
#define IPC_SETUP_SCISERVER_TASK_PRI_LOW (7)

#define MSG_APP_NAME "adc_detect"
#define MSG_NORMAL 0x01U
#define ADC_INIT_TASK_PRI (3)
#define PMIC_TASK_PRI (5)
#define TISCI_DEV_MCU_ADC0 0
#define TISCI_DEV_MCU_ADC1 1
#define TISCI_DEV_MCU_I2C0 194
#define TISCI_DEV_WKUP_I2C0 197
#define TISCI_DEV_USB0 288
#define TISCI_DEV_MMCSD0 91
/* None */

/* ==========================================================================*/
/* Function Declarations */
/* ========================================================================== */

void CanProfile_setupSciServer(void);
void ipc_initSciclient(void);
void Ipc_setupSciServer(void);
/* ========================================================================== */
/* Global Variables */
/* ========================================================================== */
/* application stack */
static uint8_t CanApp_TaskStack[APP_TASK_STACK] __attribute__((aligned(32)));
static uint8_t SciServer_TaskStack[APP_TASK_STACK] __attribute__((aligned(32)));
static uint8_t gAppTskStackMain[APP_TSK_STACK_MAIN] __attribute__ ((aligned(8192)));
static uint8_t gSciserverInitTskStack[APP_SCISERVER_INIT_TSK_STACK] __attribute__ ((aligned(8192)));

static uint8_t gAdcInitTskStack[APP_SCISERVER_INIT_TSK_STACK] __attribute__ ((aligned(8192)));
static uint8_t gPmicInitTskStack[APP_TASK_STACK] __attribute__ ((aligned(32)));

static void taskFxn(void* a0, void* a1);
static void Adc_detect_Fxn(void* a0, void* a1);
static void Pmic_wdg_Fxn(void* a0, void* a1);
extern void pmic_wdg_app_runner(void);
/**
* Without this linux kernel can not boot.
*/
const Ipc_ResourceTable ti_ipc_remoteproc_ResourceTable __attribute__ ((section (".resource_table"), aligned (4096))) =
{
{
1U, /* we're the first version that implements this */
2U, /* number of entries in the table */
{
0U,
0U, /* reserved, must be zero */
}
},
};

/* ==========================================================================*/
/* This is for adc detect */
/* ========================================================================== */
static uint32_t AdcApp_procImplicitStop(const Adc_ConfigType *Adc_ConfigPtr, uint32_t groupId);
static void AdcApp_procIsr(uint32_t grpIdx);

uint32_t Adc_TestPassed = E_OK;
/**< App Result Status Flag */
uint32_t Adc_AppLoopCount = 5U;
/**< Number of times App runs */
Adc_ValueGroupType Adc_AppBuffer[ADC_MAX_GROUP][
ADC_APP_BUF_SIZE_WORD];
/**< SetUp Result Buffer passed to driver */
Adc_ValueGroupType Adc_AppReadBuffer[ADC_MAX_GROUP][
ADC_APP_READ_BUF_SIZE_WORD];
/**< Output Result Buffer */
volatile uint32_t Adc_AppRdBufCount[ADC_MAX_GROUP];
/**< No of Samples Counter */
volatile uint32_t Adc_AppGroupDone[ADC_MAX_GROUP];
/**< Group Conversion Completion flag */
extern const Adc_ConfigType *Adc_ConfigPtr;

#define GET_ADC_VOITAGE(adcValue) (((adcValue)*(1800U)) / (4095U))

static SemaphoreP_Handle Pmic_Handle = NULL;
static TimerP_Handle dmhandle = NULL;
typedef struct Adc_Target
{
Adc_HWUnitType Adc_id;
uint16_t Channel;
uint32_t Voltage;
Adc_ValueGroupType Adc_Result;
} Adc_Target_t;

Adc_Target_t Adc_target = {
.Adc_id = ADC_UNIT_1,
.Channel = 1,
.Adc_Result = 0,
.Voltage = 0
};

/* ========================================================================== */
/* End of adc detect */
/* ========================================================================== */

int32_t local_moduleClockEnable(uint32_t moduleId)
{
int32_t retVal = 0;
int32_t status = -1;
uint32_t moduleState = 0U;
uint32_t resetState = 0U;
uint32_t contextLossState = 0U;

/* Get the module state.
No need to change the module state if it
is already ON
*/
status = Sciclient_pmGetModuleState(moduleId,
&moduleState,
&resetState,
&contextLossState,
SCICLIENT_SERVICE_WAIT_FOREVER);
if(moduleState == TISCI_MSG_VALUE_DEVICE_HW_STATE_OFF)
{
status = Sciclient_pmSetModuleState(moduleId,
TISCI_MSG_VALUE_DEVICE_SW_STATE_ON,
(TISCI_MSG_FLAG_AOP |
TISCI_MSG_FLAG_DEVICE_RESET_ISO),
SCICLIENT_SERVICE_WAIT_FOREVER);
if (status == 0)
{
status = Sciclient_pmSetModuleRst (moduleId,
0x0U,
SCICLIENT_SERVICE_WAIT_FOREVER);
if (status != 0)
{
retVal = -1;
}
}
else
{
retVal = -1;
}
}

return retVal;
}

TaskP_Handle task;
TaskP_Params taskParams;
int main(void)
{
/* Relocate FreeRTOS Reset Vectors from BTCM*/
void _freertosresetvectors (void);
memcpy((void *)0x0, (void *)_freertosresetvectors, 0x40);

OS_init();

/* Initialize the task params */
TaskP_Params_init(&taskParams);
/* Set the task priority higher than the default priority (1) */
taskParams.priority = 2;
taskParams.stack = gAppTskStackMain;
taskParams.stacksize = sizeof (gAppTskStackMain);

task = TaskP_create(taskFxn, &taskParams);
if(NULL == task)
{
OS_stop();
}
OS_start(); /* does not return */

}

static void tick_fxn(unsigned int t)
{
// Test here
}

static void taskFxn(void* a0, void* a1)
{
#ifdef UART_ENABLED
AppUtils_Init();
#endif

/* Initialize SCI Client - It must be called before board init */
ipc_initSciclient();

TaskP_Handle sciserverInitTask;
TaskP_Params sciserverInitTaskParams;

/* Initialize SCI Client Server */
TaskP_Params_init(&sciserverInitTaskParams);
sciserverInitTaskParams.priority = IPC_INIT_SCISERVER_TASK_PRI;
sciserverInitTaskParams.stack = gSciserverInitTskStack;
sciserverInitTaskParams.stacksize = sizeof (gSciserverInitTskStack);

sciserverInitTask = TaskP_create(Ipc_setupSciServer, &sciserverInitTaskParams);
if(NULL == sciserverInitTask)
{
OS_stop();
}

// Board_initCfg boardCfg;
// boardCfg = BOARD_INIT_PINMUX_CONFIG |
// BOARD_INIT_UART_STDIO;

// Board_init(boardCfg);

#if 1
TimerP_Params dmtimerPar;
TimerP_Params_init(&dmtimerPar);
dmtimerPar.period = 5000;
dmtimerPar.periodType = (uint32_t)TimerP_PeriodType_MICROSECS;
dmhandle = TimerP_create(TimerP_ANY, tick_fxn, &dmtimerPar);
if (NULL == dmhandle)
pmic_log_info("Creat dmtimer error.\n");

TimerP_start(dmhandle);
#endif

}

void ipc_initSciclient(void)
{
int32_t ret = CSL_PASS;
Sciclient_ConfigPrms_t config;

/* Now reinitialize it as default parameter */
ret = Sciclient_configPrmsInit(&config);
if (ret != CSL_PASS)
{
AppUtils_Printf(MSG_NORMAL, MSG_APP_NAME "Sciclient_configPrmsInit Failed\n");
}

#if (defined (BUILD_MCU1_0) && (defined (SOC_J721E) || defined (SOC_J7200) || defined (SOC_J721S2)))
if (ret == CSL_PASS)
{
ret = Sciclient_boardCfgParseHeader(
(uint8_t *)SCISERVER_COMMON_X509_HEADER_ADDR,
&config.inPmPrms, &config.inRmPrms);
if (ret != CSL_PASS)
{
AppUtils_Printf(MSG_NORMAL, MSG_APP_NAME "Sciclient_boardCfgParseHeader Failed\n");
}
}
#endif

if (ret == CSL_PASS)
{
ret = Sciclient_init(&config);
if (ret != CSL_PASS)
{
AppUtils_Printf(MSG_NORMAL, MSG_APP_NAME "Sciclient_init Failed\n");
}
}
}

void Ipc_setupSciServer(void)
{

Sciserver_TirtosCfgPrms_t appPrms;
int32_t ret = CSL_PASS;

ret = Sciserver_tirtosInitPrms_Init(&appPrms);

appPrms.taskPriority[SCISERVER_TASK_USER_LO] =
IPC_SETUP_SCISERVER_TASK_PRI_LOW;
appPrms.taskPriority[SCISERVER_TASK_USER_HI] =
IPC_SETUP_SCISERVER_TASK_PRI_HIGH;

if (ret == CSL_PASS)
{
ret = Sciserver_tirtosInit(&appPrms);
}

if (ret == CSL_PASS)
{
AppUtils_Printf(MSG_NORMAL, MSG_APP_NAME "Starting Sciserver..... PASSED\n");
}
else
{
AppUtils_Printf(MSG_NORMAL, MSG_APP_NAME "Starting Sciserver..... FAILED\n");
}

return;
}

1. Build the above code, the boot core is mcu1_0

2 make u-boot-a72 DM to get tispl.bin (Please note that customer doesn't add his code to tick_fxn, TI engineer could use an IO as a test point on TDA4VM EVM, toggle the IO every 5ms)

Above is customer's test result. The clock will hung after power on and it will not hung after linux kernel boot. 

Thanks
Regards
Shine

Hi Parth,

Customer is waiting for our reply. Any suggestion is appreciated.

Thanks
Regards
Shine

Hi Parth,

Would you please help look into this issue? Customer is waiting for our reply.

Thanks
Regards
Shine

Hi Shine,

Apologies for delay in response. I'll check this and get back by Monday.

Regards,
Parth

Hi Shine,

The timer configuration looks fine.

Do you see the same issue when just running the RTOS alone, without running the Linux on A72?

Also, can you try using any other timer instance and see if the results are same?

Regards,
Parth

Hi Parth,

Thank you very much.

1. It works when ccs debug without linux. 

2. Customer has tried other DM timer, the result is the same during linux kernel. 

BTW, there are only few DM timer for mcu while there are many (about 20) DM timers mentioned in TRM. 

Customer also tried to modify the mask to 0xFF, but there are still some DM timers failed to create. 

Has TI experts tested the the DM timer based on tispl.bin successfully? 

Thanks
Regards
Shine

Hi Shine,

Is the support still required on this topic?

Regards,
Parth