Other Parts Discussed in Thread: AM625
We are working on custom board based on am62xx-sk.
We need to export and control multiple GPIO's from user space for a specific application.
I did changes to the dts and added free gpio's pins to main_gpio0, main_gpio1 nodes. I am unable to export the free gpio pins(40 pins) from user space.
Getting below error when i try to export gpio.
echo 35 > /sys/class/gpio/export
export_store: invalid GPIO 35.
please find my dts changes available as source code.
####################################################################
k3_am625_aurel.dtsi
####################################################################
// SPDX-License-Identifier: GPL-2.0
/*
* Common dtsi for AM62x SK and derivatives
*
* Copyright (C) 2021-2022 Texas Instruments Incorporated - https://www.ti.com/
*/
/ {
aliases {
serial2 = &main_uart0;
mmc0 = &sdhci0;
usb0 = &usb0;
usb1 = &usb1;
ethernet0 = &cpsw_port1;
ethernet1 = &cpsw_port2;
};
chosen {
stdout-path = "serial2:115200n8";
bootargs = "console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x02800000";
};
opp-table {
/* Add 1.4GHz OPP for am625-sk board. Requires VDD_CORE to be at 0.85V */
opp-1400000000 {
opp-hz = /bits/ 64 <1400000000>;
opp-supported-hw = <0x01 0x0004>;
clock-latency-ns = <6000000>;
};
};
memory@80000000 {
device_type = "memory";
/* 512MB RAM for aurel board */
reg = <0x00000000 0x80000000 0x00000000 0x20000000>;
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
rtos_ipc_memory_region: ipc-memories@9c800000 {
compatible = "shared-dma-pool";
reg = <0x00 0x9c800000 0x00 0x00300000>;
no-map;
};
mcu_m4fss_dma_memory_region: m4f-dma-memory@9cb00000 {
compatible = "shared-dma-pool";
reg = <0x00 0x9cb00000 0x00 0x100000>;
no-map;
};
mcu_m4fss_memory_region: m4f-memory@9cc00000 {
compatible = "shared-dma-pool";
reg = <0x00 0x9cc00000 0x00 0xe00000>;
no-map;
};
wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@9da00000 {
compatible = "shared-dma-pool";
reg = <0x00 0x9da00000 0x00 0x00100000>;
no-map;
};
wkup_r5fss0_core0_memory_region: r5f-memory@9db00000 {
compatible = "shared-dma-pool";
reg = <0x00 0x9db00000 0x00 0x00c00000>;
no-map;
};
lpm_ctx_ddr: lpm-memory@9e700000 {
reg = <0x00 0x9e700000 0x00 0x80000>;
alignment = <0x1000>;
};
secure_tfa_ddr: tfa@9e780000 {
reg = <0x00 0x9e780000 0x00 0x80000>;
alignment = <0x1000>;
no-map;
};
secure_ddr: optee@9e800000 {
reg = <0x00 0x9e800000 0x00 0x01800000>; /* for OP-TEE */
alignment = <0x1000>;
no-map;
};
};
vmain_pd: regulator-0 {
/* TPS65988 PD CONTROLLER OUTPUT */
compatible = "regulator-fixed";
regulator-name = "vmain_pd";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
regulator-boot-on;
};
vcc_5v0: regulator-1 {
/* Output of TPS630702 */
compatible = "regulator-fixed";
regulator-name = "vcc_5v0";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&vmain_pd>;
regulator-always-on;
regulator-boot-on;
};
vcc_3v3_sys: regulator-2 {
/* output of LM61460-Q1 */
compatible = "regulator-fixed";
regulator-name = "vcc_3v3_sys";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&vmain_pd>;
regulator-always-on;
regulator-boot-on;
};
/*
vdd_mmc1: regulator-3 {
/* TPS22918DBVR */
/* compatible = "regulator-fixed";
regulator-name = "vdd_mmc1";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
enable-active-high;
vin-supply = <&vcc_3v3_sys>;
gpio = <&exp1 3 GPIO_ACTIVE_HIGH>;
};
*/
vcc_1v8: regulator-7 {
/* output of TPS6282518DMQ */
compatible = "regulator-fixed";
regulator-name = "vcc_1v8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
vin-supply = <&vcc_3v3_sys>;
regulator-always-on;
regulator-boot-on;
};
tlv320_mclk: clk-0 {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <12288000>;
};
// main_pwm7: dmtimer-main-pwm-7 {
// pinctrl-0 = <&usr_led_pins_default>;
// pinctrl-names = "default";
// compatible = "ti,omap-dmtimer-pwm";
// #pwm-cells = <3>;
// ti,timers = <&main_timer7>;
// };
};
&main_pmx0 {
main_gpio0_pins_default: main_gpio0_pins_default {
pinctrl-single,pins = <
AM62X_IOPAD(0x0000, PIN_OUTPUT, 7) /* (H24) OSPI0_CLK.GPIO0_0 */ /* MPU_RS485_SUPPLY2_EN */
AM62X_IOPAD(0x0004, PIN_OUTPUT, 7) /* (G25) OSPI0_LBCLKO.GPIO0_1 */ /* MPU_NAC_1_ENABLE */
AM62X_IOPAD(0x0008, PIN_OUTPUT, 7) /* (J24) OSPI0_DQS.GPIO0_2 */ /* MPU_NORMAL_RELAY2_EN */
AM62X_IOPAD(0x000c, PIN_OUTPUT, 7) /* (E25) OSPI0_D0.GPIO0_3 */ /* RS485_1_MPU_OPWR_STS */
AM62X_IOPAD(0x0010, PIN_OUTPUT, 7) /* (G24) OSPI0_D1.GPIO0_4 */
AM62X_IOPAD(0x0014, PIN_OUTPUT, 7) /* (F25) OSPI0_D2.GPIO0_5 */
AM62X_IOPAD(0x0018, PIN_OUTPUT, 7) /* (F24) OSPI0_D3.GPIO0_6 */ /* MPU_FS_ALARM_SIG */
AM62X_IOPAD(0x001c, PIN_OUTPUT, 7) /* (J23) OSPI0_D4.GPIO0_7 */ /* MPU_RS485_DEn1 */
AM62X_IOPAD(0x0020, PIN_OUTPUT, 7) /* (J25) OSPI0_D5.GPIO0_8 */ /* RS485_2_OPWR_STATUS */
AM62X_IOPAD(0x0024, PIN_OUTPUT, 7) /* (H25) OSPI0_D6.GPIO0_9 */ /* MPU_CAN0_MODE_SEL */
AM62X_IOPAD(0x0028, PIN_OUTPUT, 7) /* (J22) OSPI0_D7.GPIO0_10 */
AM62X_IOPAD(0x002c, PIN_OUTPUT, 7) /* (F23) OSPI0_CSn0.GPIO0_11 */ /* MPU_NAC_1_ FET_DRIVE */
AM62X_IOPAD(0x0030, PIN_OUTPUT, 7) /* (G21) OSPI0_CSn1.GPIO0_12 */ /* MPU_NAC_2_PF_ENABLE */
AM62X_IOPAD(0x0034, PIN_OUTPUT, 7) /* (H21) OSPI0_CSn2.GPIO0_13 */ /* MPU_NAC_2_FET_DRIVE */
AM62X_IOPAD(0x0038, PIN_OUTPUT, 7) /* (E24) OSPI0_CSn3.GPIO0_14 *//* MPU_AUX_ENABLE */
AM62X_IOPAD(0x110, PIN_INPUT, 7) /* (C25) RS485_2_MPU_2_OPWR_STS */ /* MPU_NAC_2_ENABLE */
AM62X_IOPAD(0x0174, PIN_OUTPUT, 7) /* (AD21) RGMII2_TD2.GPIO0_91 */
AM62X_IOPAD(0x124, PIN_OUTPUT, 7) /* (A23) MMC2_SDCD.GPIO0_71 */ /* MPU_LCD_RST */
AM62X_IOPAD(0x0154, PIN_OUTPUT, 7) /* (AB16) RGMII1_RD2.GPIO0_83 */ /* MPU_AUX_1_EN */
AM62X_IOPAD(0x114, PIN_OUTPUT, 7) /* (B24) EXT_NW_MPU_GPIO1 */ /* MPU_AUX_2_EN */
AM62X_IOPAD(0x128, PIN_INPUT, 7) /* (B23) MMC2_SDWP.GPIO0_72 */ /* GENERIC_DI2_MPU_STS */
AM62X_IOPAD(0x003c, PIN_OUTPUT, 7) /* (M25) GPMC0_AD0.GPIO0_15 */ /* BOOT_MODE_0-15 */
AM62X_IOPAD(0x0040, PIN_OUTPUT, 7) /* (N23) GPMC0_AD1.GPIO0_16 */
AM62X_IOPAD(0x0044, PIN_OUTPUT, 7) /* (N24) GPMC0_AD2.GPIO0_17 */
AM62X_IOPAD(0x0048, PIN_OUTPUT, 7) /* (N25) GPMC0_AD3.GPIO0_18 */
AM62X_IOPAD(0x004c, PIN_OUTPUT, 7) /* (P24) GPMC0_AD4.GPIO0_19 */
AM62X_IOPAD(0x0050, PIN_OUTPUT, 7) /* (P22) GPMC0_AD5.GPIO0_20 */
AM62X_IOPAD(0x0054, PIN_OUTPUT, 7) /* (P21) GPMC0_AD6.GPIO0_21 */
AM62X_IOPAD(0x0058, PIN_OUTPUT, 7) /* (R23) GPMC0_AD7.GPIO0_22 */
// AM62X_IOPAD(0x005c, PIN_OUTPUT, 7) /* (R24) GPMC0_AD8.GPIO0_23 */
// AM62X_IOPAD(0x0060, PIN_OUTPUT, 7) /* (R25) GPMC0_AD9.GPIO0_24 */
// AM62X_IOPAD(0x0068, PIN_OUTPUT, 7) /* (R21) GPMC0_AD11.GPIO0_26 */
// AM62X_IOPAD(0x006c, PIN_OUTPUT, 7) /* (T22) GPMC0_AD12.GPIO0_27 */
// AM62X_IOPAD(0x0070, PIN_OUTPUT, 7) /* (T24) GPMC0_AD13.GPIO0_28 */
// AM62X_IOPAD(0x0074, PIN_OUTPUT, 7) /* (U25) GPMC0_AD14.GPIO0_29 */
// AM62X_IOPAD(0x0078, PIN_OUTPUT, 7) /* (U24) GPMC0_AD15.GPIO0_30 */
AM62X_IOPAD(0x007c, PIN_OUTPUT, 7) /* (P25) GPMC0_CLK.GPIO0_31 */ /* MPU_SYS_GF_EN */
AM62X_IOPAD(0x0084, PIN_OUTPUT, 7) /* (L23) GPMC0_ADVn_ALE.GPIO0_32 */ /* MPU_NAC_1_PF_ENABLE*/
AM62X_IOPAD(0x0088, PIN_OUTPUT, 7) /* (L24) GPMC0_OEn_REn.GPIO0_33 */
AM62X_IOPAD(0x008c, PIN_OUTPUT, 7) /* (L25) GPMC0_WEn.GPIO0_34 */
AM62X_IOPAD(0x0090, PIN_OUTPUT, 7) /* (M24) GPMC0_BE0n_CLE.GPIO0_35 */ /* MPU_ETH1_GFD_EN */
AM62X_IOPAD(0x0094, PIN_OUTPUT, 7) /* (N20) GPMC0_BE1n.GPIO0_36 */ /* MPU_ETH2_GFD_EN */
AM62X_IOPAD(0x0098, PIN_OUTPUT, 7) /* (U23) GPMC0_WAIT0.GPIO0_37 */ /* MPU_TRBL_RLY_EN_n */
AM62X_IOPAD(0x009c, PIN_INPUT, 7) /* (V25) GPMC0_WAIT1.GPIO0_38 */ /* MPU_RS485_DEn2/MCASP1_FSX - Pulled Down on HW Base Board*/
AM62X_IOPAD(0x00a0, PIN_OUTPUT, 7) /* (K25) GPMC0_WPn.GPIO0_39 */ /*MPU_GENERIC_1_INPUT_CTRL*/
AM62X_IOPAD(0x00a4, PIN_INPUT, 7) /* (M22) GPMC0_DIR.GPIO0_40 */ /* AUX_MPU_OC_FAULT_n */
AM62X_IOPAD(0x00a8, PIN_OUTPUT, 7) /* (M21) GPMC0_CSn0.GPIO0_41 */ /* MPU_RS485_SUPPLY1_ENABLE */
AM62X_IOPAD(0x00ac, PIN_OUTPUT, 7) /* (L21) GPMC0_CSn1.GPIO0_42 */ /* MPU_FS_TRBL_SIG */
AM62X_IOPAD(0x00b8, PIN_OUTPUT, 7) /* (U22) VOUT0_DATA0.GPIO0_45 *//*MPU_VPP_ENABLE*/
AM62X_IOPAD(0x00bc, PIN_OUTPUT, 7) /* (V24) VOUT0_DATA1.GPIO0_46 *//*MPU_PMIC_VSEL_SD*/
AM62X_IOPAD(0x00c0, PIN_OUTPUT, 7) /* (W25) VOUT0_DATA2.GPIO0_47 */ /* MPU_WC */
AM62X_IOPAD(0x00c4, PIN_OUTPUT, 7) /* (W24) VOUT0_DATA3.GPIO0_48 */ /* MPU_WDT_ENABLE */
AM62X_IOPAD(0x00d0, PIN_OUTPUT, 7) /* (Y23) VOUT0_DATA6.GPIO0_51 */
AM62X_IOPAD(0x00d4, PIN_OUTPUT, 7) /* (AA25) VOUT0_DATA7.GPIO0_52 */
AM62X_IOPAD(0x00d8, PIN_OUTPUT, 7) /* (V21) VOUT0_DATA8.GPIO0_53 *//*MPU_PMIC_EN*/
AM62X_IOPAD(0x00dc, PIN_OUTPUT, 7) /* (W21) VOUT0_DATA9.GPIO0_54 *//*MPU_LCD_RST*/
AM62X_IOPAD(0x013c, PIN_OUTPUT, 7) /* (AE18) RGMII1_TD2.GPIO0_77 */
AM62X_IOPAD(0x0140, PIN_OUTPUT, 7) /* (AD18) RGMII1_TD3.GPIO0_78 */
AM62X_IOPAD(0x0158, PIN_OUTPUT, 7) /* (AA15) RGMII1_RD3.GPIO0_84 */
AM62X_IOPAD(0x0120, PIN_OUTPUT, 7) /* (C24) GPIO0_70 MPU_FS_ALARM_SIG */
AM62X_IOPAD(0x118, PIN_INPUT, 7) /* (D25) USB1_MPU_OVR_CUR_STSn */ /* This should be input it is connected to OC of TPS2051 - GPIO0_69*/
>;
};
main_gpio1_pins_default: main_gpio1_pins_default {
pinctrl-single,pins = <
AM62X_IOPAD(0x0178, PIN_INPUT, 7) /* (AC20) RGMII2_TD3.GPIO1_0 */ /* MPU_LCD_INTR */
AM62X_IOPAD(0x018c, PIN_INPUT, 7) /* (AC21) RGMII2_RD2.GPIO1_5 */ /* MCU_eMMC_RST_N */
AM62X_IOPAD(0x0190, PIN_INPUT, 7) /* (AE22) RGMII2_RD3.GPIO1_6 */ /* MPU_CLK_BUFFER_EN */
AM62X_IOPAD(0x019c, PIN_OUTPUT, 7) /* (B18) MCASP0_AXR1.GPIO1_9 */ /* MPU_NORMAL_RELAY1_EN */
AM62X_IOPAD(0x01a0, PIN_OUTPUT, 7) /* (E18) MCASP0_AXR0.GPIO1_10 */ /* MPU_GENERIC_2_INPUT_CTRL */
AM62X_IOPAD(0x01a4, PIN_OUTPUT, 7) /* (B20) MCASP0_ACLKX.GPIO1_11 */
AM62X_IOPAD(0x01a8, PIN_OUTPUT, 7) /* (D20) MCASP0_AFSX.GPIO1_12 */ /* MPU_ALARM_RELAY_EN */
AM62X_IOPAD(0x01b8, PIN_OUTPUT, 7) /* (C13) SPI0_CS1.GPIO1_16 */ /* MPU_RS485_REn */
AM62X_IOPAD(0x01c4, PIN_OUTPUT, 7) /* (B14) SPI0_D1.GPIO1_19 */ /* MPU_CAN1_MODE_SEL*/
>;
};
main_uart0_pins_default: main-uart0-pins-default {
pinctrl-single,pins = <
AM62X_IOPAD(0x1c8, PIN_INPUT, 0) /* (D14) UART0_RXD */
AM62X_IOPAD(0x1cc, PIN_OUTPUT, 0) /* (E14) UART0_TXD */
>;
};
main_uart2_pins_default: main_uart2-pins_default {
pinctrl-single,pins = <
AM62X_IOPAD(0x0224, PIN_INPUT, 3) /* (D22) MMC1_DAT3.UART2_RXD */ /* RS485_MPU_RXD */
AM62X_IOPAD(0x0228, PIN_OUTPUT, 3) /* (C21) MMC1_DAT2.UART2_TXD */ /* MPU_RS485_TXD */
AM62X_IOPAD(0x0104, PIN_INPUT, 4) /* (AC24) VOUT0_PCLK.UART2_CTSn */ /* RS485_MPU_CTS */
AM62X_IOPAD(0x0100, PIN_OUTPUT, 4) /* (AC25) VOUT0_VSYNC.UART2_RTSn*/ /* MPU_RS485_RTS */
>;
};
main_i2c0_pins_default: main-i2c0-pins-default {
pinctrl-single,pins = <
AM62X_IOPAD(0x1e0, PIN_INPUT_PULLUP, 0) /* (B16) I2C0_SCL */
AM62X_IOPAD(0x1e4, PIN_INPUT_PULLUP, 0) /* (A16) I2C0_SDA */
>;
};
main_i2c1_pins_default: main-i2c1-pins-default {
pinctrl-single,pins = <
AM62X_IOPAD(0x1e8, PIN_INPUT_PULLUP, 0) /* (B17) I2C1_SCL */
AM62X_IOPAD(0x1ec, PIN_INPUT_PULLUP, 0) /* (A17) I2C1_SDA */
>;
};
main_i2c2_pins_default: main-i2c2-pins-default {
pinctrl-single,pins = <
AM62X_IOPAD(0x0b0, PIN_INPUT_PULLUP, 1) /* (K22) GPMC0_CSn2.I2C2_SCL */
AM62X_IOPAD(0x0b4, PIN_INPUT_PULLUP, 1) /* (K24) GPMC0_CSn3.I2C2_SDA */
>;
};
main_mmc0_pins_default: main-mmc0-pins-default {
pinctrl-single,pins = <
AM62X_IOPAD(0x220, PIN_INPUT, 0) /* (Y3) MMC0_CMD */
AM62X_IOPAD(0x218, PIN_INPUT, 0) /* (AB1) MMC0_CLK */
AM62X_IOPAD(0x214, PIN_INPUT, 0) /* (AA2) MMC0_DAT0 */
AM62X_IOPAD(0x210, PIN_INPUT, 0) /* (AA1) MMC0_DAT1 */
AM62X_IOPAD(0x20c, PIN_INPUT, 0) /* (AA3) MMC0_DAT2 */
AM62X_IOPAD(0x208, PIN_INPUT, 0) /* (Y4) MMC0_DAT3 */
AM62X_IOPAD(0x204, PIN_INPUT, 0) /* (AB2) MMC0_DAT4 */
AM62X_IOPAD(0x200, PIN_INPUT, 0) /* (AC1) MMC0_DAT5 */
AM62X_IOPAD(0x1fc, PIN_INPUT, 0) /* (AD2) MMC0_DAT6 */
AM62X_IOPAD(0x1f8, PIN_INPUT, 0) /* (AC2) MMC0_DAT7 */
>;
};
main_mdio1_pins_default: main-mdio1-pins-default {
pinctrl-single,pins = <
AM62X_IOPAD(0x160, PIN_OUTPUT, 0) /* (AD24) MDIO0_MDC */
AM62X_IOPAD(0x15c, PIN_INPUT, 0) /* (AB22) MDIO0_MDIO */
>;
};
//myrmii1_pins_default: myrmii1-pins-default {
main_rmii1_pins_default: main-rmii1-pins-default{
pinctrl-single,pins = <
AM62X_IOPAD(0x0130, PIN_INPUT, 1) /* (AE19) RGMII1_TXC.RMII1_CRS_DV */
AM62X_IOPAD(0x0148, PIN_INPUT, 1) /* (AD17) RGMII1_RXC.RMII1_REF_CLK */
AM62X_IOPAD(0x014c, PIN_INPUT, 1) /* (AB17) RGMII1_RD0.RMII1_RXD0 */
AM62X_IOPAD(0x0150, PIN_INPUT, 1) /* (AC17) RGMII1_RD1.RMII1_RXD1 */
AM62X_IOPAD(0x0144, PIN_INPUT, 1) /* (AE17) RGMII1_RX_CTL.RMII1_RX_ER */
AM62X_IOPAD(0x0134, PIN_OUTPUT, 1) /* (AE20) RGMII1_TD0.RMII1_TXD0 */
AM62X_IOPAD(0x0138, PIN_OUTPUT, 1) /* (AD20) RGMII1_TD1.RMII1_TXD1 */
AM62X_IOPAD(0x012c, PIN_OUTPUT, 1) /* (AD19) RGMII1_TX_CTL.RMII1_TX_EN */
>;
};
//myrmii2_pins_default: myrmii2-pins-default {
main_rmii2_pins_default: main-rmii2-pins-default{
pinctrl-single,pins = <
AM62X_IOPAD(0x0168, PIN_INPUT, 1) /* (AE21) RGMII2_TXC.RMII2_CRS_DV */
AM62X_IOPAD(0x0180, PIN_INPUT, 1) /* (AD23) RGMII2_RXC.RMII2_REF_CLK */
AM62X_IOPAD(0x0184, PIN_INPUT, 1) /* (AE23) RGMII2_RD0.RMII2_RXD0 */
AM62X_IOPAD(0x0188, PIN_INPUT, 1) /* (AB20) RGMII2_RD1.RMII2_RXD1 */
AM62X_IOPAD(0x017c, PIN_INPUT, 1) /* (AD22) RGMII2_RX_CTL.RMII2_RX_ER */
AM62X_IOPAD(0x016c, PIN_OUTPUT, 1) /* (Y18) RGMII2_TD0.RMII2_TXD0 */
AM62X_IOPAD(0x0170, PIN_OUTPUT, 1) /* (AA18) RGMII2_TD1.RMII2_TXD1 */
AM62X_IOPAD(0x0164, PIN_OUTPUT, 1) /* (AA19) RGMII2_TX_CTL.RMII2_TX_EN */
>;
};
//ain_dss0_pins_default: main-dss0-pins-default {
//pinctrl-single,pins = <
// AM62X_IOPAD(0x0100, PIN_OUTPUT, 0) /* (AC25) VOUT0_VSYNC */
// AM62X_IOPAD(0x00f8, PIN_OUTPUT, 0) /* (AB24) VOUT0_HSYNC */
// AM62X_IOPAD(0x0104, PIN_OUTPUT, 0) /* (AC24) VOUT0_PCLK */
// AM62X_IOPAD(0x00fc, PIN_OUTPUT, 0) /* (Y20) VOUT0_DE */
// AM62X_IOPAD(0x00b8, PIN_OUTPUT, 0) /* (U22) VOUT0_DATA0 */
// AM62X_IOPAD(0x00bc, PIN_OUTPUT, 0) /* (V24) VOUT0_DATA1 */
// AM62X_IOPAD(0x00c0, PIN_OUTPUT, 0) /* (W25) VOUT0_DATA2 */
// AM62X_IOPAD(0x00c4, PIN_OUTPUT, 0) /* (W24) VOUT0_DATA3 */
// AM62X_IOPAD(0x00c8, PIN_OUTPUT, 0) /* (Y25) VOUT0_DATA4 */
// AM62X_IOPAD(0x00cc, PIN_OUTPUT, 0) /* (Y24) VOUT0_DATA5 */
// AM62X_IOPAD(0x00d0, PIN_OUTPUT, 0) /* (Y23) VOUT0_DATA6 */
// AM62X_IOPAD(0x00d4, PIN_OUTPUT, 0) /* (AA25) VOUT0_DATA7 */
// AM62X_IOPAD(0x00d8, PIN_OUTPUT, 0) /* (V21) VOUT0_DATA8 */
// AM62X_IOPAD(0x00dc, PIN_OUTPUT, 0) /* (W21) VOUT0_DATA9 */
// AM62X_IOPAD(0x00e0, PIN_OUTPUT, 0) /* (V20) VOUT0_DATA10 */
// AM62X_IOPAD(0x00e4, PIN_OUTPUT, 0) /* (AA23) VOUT0_DATA11 */
// AM62X_IOPAD(0x00e8, PIN_OUTPUT, 0) /* (AB25) VOUT0_DATA12 */
// AM62X_IOPAD(0x00ec, PIN_OUTPUT, 0) /* (AA24) VOUT0_DATA13 */
// AM62X_IOPAD(0x00f0, PIN_OUTPUT, 0) /* (Y22) VOUT0_DATA14 */
// AM62X_IOPAD(0x00f4, PIN_OUTPUT, 0) /* (AA21) VOUT0_DATA15 */
// AM62X_IOPAD(0x005c, PIN_OUTPUT, 1) /* (R24) GPMC0_AD8.VOUT0_DATA16 */
// AM62X_IOPAD(0x0060, PIN_OUTPUT, 1) /* (R25) GPMC0_AD9.VOUT0_DATA17 */
// AM62X_IOPAD(0x0064, PIN_OUTPUT, 1) /* (T25) GPMC0_AD10.VOUT0_DATA18 */
// AM62X_IOPAD(0x0068, PIN_OUTPUT, 1) /* (R21) GPMC0_AD11.VOUT0_DATA19 */
// AM62X_IOPAD(0x006c, PIN_OUTPUT, 1) /* (T22) GPMC0_AD12.VOUT0_DATA20 */
// AM62X_IOPAD(0x0070, PIN_OUTPUT, 1) /* (T24) GPMC0_AD13.VOUT0_DATA21 */
// AM62X_IOPAD(0x0074, PIN_OUTPUT, 1) /* (U25) GPMC0_AD14.VOUT0_DATA22 */
// AM62X_IOPAD(0x0078, PIN_OUTPUT, 1) /* (U24) GPMC0_AD15.VOUT0_DATA23 */
//>;
// };
// vdd_sd_dv_pins_default: vdd-sd-dv-pins-default {
// pinctrl-single,pins = <
// AM62X_IOPAD(0x07c, PIN_OUTPUT, 7) /* (P25) GPMC0_CLK.GPIO0_31 */
// >;
// };
main_usb1_pins_default: main-usb1-pins-default {
pinctrl-single,pins = <
AM62X_IOPAD(0x0258, PIN_OUTPUT, 0) /* (F18) USB1_DRVVBUS */
>;
};
};
&wkup_uart0 {
/* WKUP UART0 is used by DM firmware */
status = "reserved";
};
&mcu_uart0 {
status = "disabled";
};
&main_uart0 {
pinctrl-names = "default";
pinctrl-0 = <&main_uart0_pins_default>;
};
&main_uart1 {
/* Main UART1 is used by TIFS firmware */
status = "reserved";
};
&main_uart2 {
pinctrl-names = "default";
pinctrl-0 = <&main_uart2_pins_default>;
compatible = "ti,omap2-uart";
rs485-rts-delay = <2 2>;
rs485-rts-active-high;
linux,rs485-enabled-at-boot-time;
status = "enabled";
};
&main_uart3 {
status = "disabled";
};
&main_uart4 {
status = "disabled";
};
&main_uart5 {
status = "disabled";
};
&main_uart6 {
status = "disabled";
};
&mcu_i2c0 {
status = "disabled";
};
&wkup_i2c0 {
status = "disabled";
};
&main_i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&main_i2c0_pins_default>;
clock-frequency = <400000>;
typec_pd: usb-pd@3f {
compatible = "ti,tps6598x";
reg = <0x3f>;
connector {
ports {
#address-cells = <1>;
#size-cells = <0>;
port@1 {
reg = <1>;
usb_con_hs: endpoint {
remote-endpoint = <&typec_hs>;
};
};
};
};
};
};
&main_i2c1 {
pinctrl-names = "default";
pinctrl-0 = <&main_i2c1_pins_default>;
clock-frequency = <100000>;
};
&main_i2c2 {
status = "disabled";
};
&main_i2c3 {
status = "disabled";
};
&main_gpio0 {
pinctrl-names = "default";
pinctrl-0 = <&main_gpio0_pins_default>;
status = "okay";
};
&main_gpio1 {
pinctrl-names = "default";
pinctrl-0 = <&main_gpio1_pins_default>;
status = "okay";
};
&sdhci0 {
pinctrl-names = "default";
pinctrl-0 = <&main_mmc0_pins_default>;
ti,driver-strength-ohm = <50>;
disable-wp;
};
&usbss0 {
ti,vbus-divider;
};
&usb0 {
#address-cells = <1>;
#size-cells = <0>;
usb-role-switch;
port@1 {
reg = <1>;
typec_hs: endpoint {
remote-endpoint = <&usb_con_hs>;
};
};
};
&usb1 {
dr_mode = "host";
pinctrl-names = "default";
pinctrl-0 = <&main_usb1_pins_default>;
};
&cpsw3g {
pinctrl-names = "default";
pinctrl-0 = <&main_mdio1_pins_default
&main_rmii1_pins_default
&main_rmii2_pins_default>;
};
&cpsw_port1 {
phy-mode = "rmii";
phy-handle = <&cpsw3g_phy0>;
};
&cpsw_port2 {
phy-mode = "rmii";
phy-handle = <&cpsw3g_phy1>;
};
&cpsw3g_mdio {
cpsw3g_phy0: ethernet-phy@3 {
reg = <0x03>;
//ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
//ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
ti,min-output-impedance;
};
cpsw3g_phy1: ethernet-phy@1 {
reg = <0x05>;
//ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
//ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
ti,min-output-impedance;
};
};
//&dss {
// pinctrl-names = "default";
// pinctrl-0 = <&main_dss0_pins_default>;
//};
&mcasp0 {
status = "disabled";
};
&mcasp1 {
status = "disabled";
};
&mcasp2 {
status = "disabled";
};
&mailbox0_cluster0 {
mbox_m4_0: mbox-m4-0 {
ti,mbox-rx = <0 0 0>;
ti,mbox-tx = <1 0 0>;
};
mbox_r5_0: mbox-r5-0 {
ti,mbox-rx = <2 0 0>;
ti,mbox-tx = <3 0 0>;
};
};
/*
&ospi0 {
pinctrl-names = "default";
pinctrl-0 = <&ospi0_pins_default>;
};
*/
&mcu_m4fss {
mboxes = <&mailbox0_cluster0 &mbox_m4_0>;
memory-region = <&mcu_m4fss_dma_memory_region>,
<&mcu_m4fss_memory_region>;
};
&wkup_r5fss0_core0 {
mboxes = <&mailbox0_cluster0 &mbox_r5_0>;
memory-region = <&wkup_r5fss0_core0_dma_memory_region>,
<&wkup_r5fss0_core0_memory_region>;
};
&mcu_rti0 {
/* MCU RTI0 is used by M4F firmware */
status = "reserved";
};
&wkup_rti0 {
/* WKUP RTI0 is used by DM firmware */
status = "reserved";
};
&epwm0 {
status = "disabled";
};
&epwm1 {
status = "disabled";
};
&epwm2 {
status = "disabled";
};
&ecap0_pwm {
status = "disabled";
};
&ecap1_pwm {
status = "disabled";
};
&ecap2_pwm {
status = "disabled";
};
###############################################################################
am62xx-fsp.dts
###############################################################################
// SPDX-License-Identifier: GPL-2.0
/*
* AM625 SK: https://www.ti.com/lit/zip/sprr448
*
* Copyright (C) 2021-2022 Texas Instruments Incorporated - https://www.ti.com/
*/
/dts-v1/;
#include <dt-bindings/pinctrl/k3.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/net/ti-dp83867.h>
#include "ti/k3-am625.dtsi"
#include "k3_am625_aurel.dtsi"
//#include "ti/k3-am62x-sk-common.dtsi"
/ {
compatible = "ti,am625-aurel-v0.7", "ti,am625"; //03-Nov-2022
model = "Aurel-v0.7180723-04"; //platform-mmddyy-revision
/delete-node/cpu@2; //Disabling 2 CPU cores
/delete-node/cpu@3;
transceiver1: can-phy0 {
compatible = "ti,tcan1042";
#phy-cells = <0>;
max-bitrate = <5000000>;
};
display {
compatible = "microtips,13-101hieb0hf0-s";
/*
* Note that the OLDI TX 0 transmits the odd set of pixels
* while the OLDI TX 1 transmits the even set. This is a
* fixed configuration in the IP integration and is not
* changeable. The properties, "dual-lvds-odd-pixels" and
* "dual-lvds-even-pixels" have been used to merely
* identify if a Dual Link configuration is required.
* Swapping them will not make any difference.
*/
port@0 {
dual-lvds-odd-pixels;
lcd_in0: endpoint {
remote-endpoint = <&oldi_out0>;
};
};
port@1 {
dual-lvds-even-pixels;
lcd_in1: endpoint {
remote-endpoint = <&oldi_out1>;
};
};
};
// watchdog: watchdog {
// /* TPS3431 */
// compatible = "linux,wdt-gpio";
// gpios = <&main_gpio1 45 GPIO_ACTIVE_LOW>;
// hw_algo = "toggle";
/* mGaik -> Keep this only if watchdog timer cannot be disabled and you want driver to keep toggling the signal without a APP. */
// always-running;
/* mGaik -> CAP at CWD input of TPS3431 is at 470nF making Reset timeout at 36.433 Sec */
/* Ideal 36433, but we pet at 36000 mSec rate bit faster than time out, this ensure if we cross 36000 then we do see WDT trigger in */
// hw_margin_ms = <36000>; //36-Sec
// status = "okay";
// };
};
&mcu_pmx0 {
mcu_i2c0_pins_default: mcu-i2c0-pins-default {
pinctrl-single,pins = <
AM62X_MCU_IOPAD(0x044, PIN_INPUT_PULLUP, 0) /* (A8) MCU_I2C0_SCL */
AM62X_MCU_IOPAD(0x048, PIN_INPUT_PULLUP, 0) /* (D10) MCU_I2C0_SDA */
>;
};
mcu_mcan1_pins_default: mcu_mcan0_pins_default {
pinctrl-single,pins = <
AM62X_MCU_IOPAD(0x0038, PIN_INPUT, 0) /* (B3) MCU_MCAN0_RX */
AM62X_MCU_IOPAD(0x0034, PIN_OUTPUT, 0) /* (D6) MCU_MCAN0_TX */
>;
};
};
&main_pmx0 {
wlan_en_pins_default: wlan-en-pins-default {
pinctrl-single,pins = <
AM62X_IOPAD(0x124, PIN_OUTPUT, 7) /* (A23) MMC2_SDCD.GPIO0_71 */
>;
};
main_mmc2_pins_default: main-mmc2-pins-default {
pinctrl-single,pins = <
AM62X_IOPAD(0x120, PIN_INPUT, 0) /* (C24) MMC2_CMD */
AM62X_IOPAD(0x118, PIN_INPUT, 0) /* (D25) MMC2_CLK */
AM62X_IOPAD(0x114, PIN_INPUT, 0) /* (B24) MMC2_DAT0 */
AM62X_IOPAD(0x110, PIN_INPUT, 0) /* (C25) MMC2_DAT1 */
AM62X_IOPAD(0x10c, PIN_INPUT, 0) /* (E23) MMC2_DAT2 */
AM62X_IOPAD(0x108, PIN_INPUT, 0) /* (D24) MMC2_DAT3 */
AM62X_IOPAD(0x11c, PIN_INPUT, 0) /* (#N/A) MMC2_CLKB */
>;
};
main_wlirq_pins_default: main-wlirq-pins-default {
pinctrl-single,pins = <
AM62X_IOPAD(0x128, PIN_INPUT, 7) /* (B23) MMC2_SDWP.GPIO0_72 */
>;
};
main_mcan0_pins_default: main-mcan0-pins-default {
pinctrl-single,pins = <
AM62X_IOPAD(0x1dc, PIN_INPUT, 0) /* (E15) MCAN0_RX */
AM62X_IOPAD(0x1d8, PIN_OUTPUT, 0) /* (C15) MCAN0_TX */
>;
};
main_spi2_pins_default: main-spi2-pins-default {
pinctrl-single,pins = <
AM62X_IOPAD(0x1B0, PIN_OUTPUT, 1) /* (A20) SPI2_CLK pins on expansion Header*/
AM62X_IOPAD(0x1AC, PIN_OUTPUT, 1) /* (E19) SPI2_CS0 pins on expansion Header */
AM62X_IOPAD(0x194, PIN_OUTPUT, 1) /* (B19) SPI2_D0 pins on expansion Header */
AM62X_IOPAD(0x198, PIN_INPUT, 1) /* (A19) SPI2_D1 pins on expansion Header */
>;
};
main_oldi0_pins_default: main-oldi0-pins-default {
pinctrl-single,pins = <
AM62X_IOPAD(0x0260, PIN_OUTPUT, 0) /* (AA5) OLDI0_A0N */
AM62X_IOPAD(0x025c, PIN_OUTPUT, 0) /* (Y6) OLDI0_A0P */
AM62X_IOPAD(0x0268, PIN_OUTPUT, 0) /* (AD3) OLDI0_A1N */
AM62X_IOPAD(0x0264, PIN_OUTPUT, 0) /* (AB4) OLDI0_A1P */
AM62X_IOPAD(0x0270, PIN_OUTPUT, 0) /* (Y8) OLDI0_A2N */
AM62X_IOPAD(0x026c, PIN_OUTPUT, 0) /* (AA8) OLDI0_A2P */
AM62X_IOPAD(0x0278, PIN_OUTPUT, 0) /* (AB6) OLDI0_A3N */
AM62X_IOPAD(0x0274, PIN_OUTPUT, 0) /* (AA7) OLDI0_A3P */
AM62X_IOPAD(0x0280, PIN_OUTPUT, 0) /* (AC6) OLDI0_A4N */
AM62X_IOPAD(0x027c, PIN_OUTPUT, 0) /* (AC5) OLDI0_A4P */
AM62X_IOPAD(0x0288, PIN_OUTPUT, 0) /* (AE5) OLDI0_A5N */
AM62X_IOPAD(0x0284, PIN_OUTPUT, 0) /* (AD6) OLDI0_A5P */
AM62X_IOPAD(0x0290, PIN_OUTPUT, 0) /* (AE6) OLDI0_A6N */
AM62X_IOPAD(0x028c, PIN_OUTPUT, 0) /* (AD7) OLDI0_A6P */
AM62X_IOPAD(0x0298, PIN_OUTPUT, 0) /* (AD8) OLDI0_A7N */
AM62X_IOPAD(0x0294, PIN_OUTPUT, 0) /* (AE7) OLDI0_A7P */
AM62X_IOPAD(0x02a0, PIN_OUTPUT, 0) /* (AD4) OLDI0_CLK0N */
AM62X_IOPAD(0x029c, PIN_OUTPUT, 0) /* (AE3) OLDI0_CLK0P */
AM62X_IOPAD(0x02a8, PIN_OUTPUT, 0) /* (AE4) OLDI0_CLK1N */
AM62X_IOPAD(0x02a4, PIN_OUTPUT, 0) /* (AD5) OLDI0_CLK1P */
>;
};
};
&main_mcan0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&main_mcan0_pins_default>;
phys = <&transceiver1>;
};
&mcu_i2c0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&mcu_i2c0_pins_default>;
clock-frequency = <400000>;
bq32000: rtc@68 {
compatible = "ti,bq32000";
trickle-resistor-ohms = <1120>;
reg = <0x68>;
};
};
&main_i2c1 {
status = "okay";
gt928@5d {
compatible = "goodix,gt928";
reg = <0x5d>;
interrupt-parent = <&main_gpio1>;
interrupts = <0 IRQ_TYPE_EDGE_FALLING>;
reset-gpios = <&main_gpio0 54 GPIO_ACTIVE_LOW>;
};
};
&main_spi2{
pinctrl-names = "default";
pinctrl-0 = <&main_spi2_pins_default>;
status = "okay";
//pindir-d0-out-d1-in=1;
adc@0 {
compatible = "ti,adc128s052";
reg = <0>;
vref-supply = <&vcc_3v3_sys>;
spi-max-frequency = <1000000>;
#io-channel-cells = <1>;
};
};
&dss {
pinctrl-names = "default";
pinctrl-0 = <&main_oldi0_pins_default>;
status = "enabled";
};
&dss_ports {
#address-cells = <1>;
#size-cells = <0>;
/* VP1: LVDS Output (OLDI TX 0) */
port@0 {
reg = <0>;
oldi_out0: endpoint {
remote-endpoint = <&lcd_in0>;
};
};
/* VP1: LVDS Output (OLDI TX 1) */
port@2 {
reg = <2>;
oldi_out1: endpoint {
remote-endpoint = <&lcd_in1>;
};
};
};
