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SK-TDA4VM: problems compiling model artifacts

Part Number: SK-TDA4VM


Hello,

After realizing that my compiled models were not running because I had an SDK mismatch, I am trying to compile artifacts with the right version (SDK 08.04.00.06).

However, I'm facing a problem while compiling the object detection models:

root@1ddb1f2528e5:/home/root/examples/osrt_python/tfl# python3 tflrt_delegate.py -c
Running 1 Models - ['tf2_ssd_mobilenet_v2_coco17_ptq']


Running_Model :  tf2_ssd_mobilenet_v2_coco17_ptq
TIDL Meta PipeLine (Proto) File  :

Number of OD backbone nodes = 0
Size of odBackboneNodeIds = 0
Warning : concat requires 4D input tensors - only 3 dims present..  Ignore if object detection network

 Number of subgraphs:3 , 99 nodes delegated out of 102 nodes

Warning : concat requires 4D input tensors - only 3 dims present..  Ignore if object detection network

 ************** Frame index 1 : Running float import *************
****************************************************
**   All the Tensor Dimensions has to be greater then Zero
**   DIM Error - For Tensor 95, Dim 3 is -1587263968
****************************************************
TIDL ALLOWLISTING LAYER CHECK: [TIDL_ConcatLayer] Concatenate in batch axis is not supported.
WARNING: [TIDL_E_DATAFLOW_INFO_NULL] ti_cnnperfsim.out fails to allocate memory in MSMC. Please look into perfsim log. This model can only be used on PC emulation, it will get fault on target.
****************************************************
**          1 WARNINGS          1 ERRORS          **
****************************************************
The soft limit is 2048
The hard limit is 2048
MEM: Init ... !!!
MEM: Init ... Done !!!
 0.0s:  VX_ZONE_INIT:Enabled
 0.65s:  VX_ZONE_ERROR:Enabled
 0.72s:  VX_ZONE_WARNING:Enabled
 0.26870s:  VX_ZONE_INIT:[tivxInit:178] Initialization Done !!!

INFORMATION : Standard number of input dimensions is 4, given 3 [1, 1917, 4]-- Will be converted to [1, 1, 1917, 4] (NCHW format) internally

INFORMATION : Standard number of input dimensions is 4, given 3 [1, 1917, 91]-- Will be converted to [1, 1, 1917, 91] (NCHW format) internally
Warning : Requested Output Data Convert Layer is not Added to the network, It is currently not Optimal
Warning : Requested Output Data Convert Layer is not Added to the network, It is currently not Optimal
Warning : Requested Output Data Convert Layer is not Added to the network, It is currently not Optimal
Warning : Requested Output Data Convert Layer is not Added to the network, It is currently not Optimal

 ************** Frame index 1 : Running float import *************
WARNING: [TIDL_E_DATAFLOW_INFO_NULL] ti_cnnperfsim.out fails to allocate memory in MSMC. Please look into perfsim log. This model can only be used on PC emulation, it will get fault on target.
****************************************************
**          1 WARNINGS          0 ERRORS          **
****************************************************
INFO: Created TensorFlow Lite XNNPACK delegate for CPU.
 3.948170s:  VX_ZONE_ERROR:[ownTensorCheckSizes:189] Invalid view parameter(s) in dimension: 1


root@1ddb1f2528e5:/home/root/examples/osrt_python/tfl# python3 tflrt_delegate.py -c
Running 1 Models - ['ssd_mobilenet_v2_coco_quant_postprocess']


Running_Model :  ssd_mobilenet_v2_coco_quant_postprocess
TIDL Meta PipeLine (Proto) File  :

Number of OD backbone nodes = 0
Size of odBackboneNodeIds = 0
Warning : concat requires 4D input tensors - only 3 dims present..  Ignore if object detection network

 Number of subgraphs:13 , 99 nodes delegated out of 111 nodes


 ************** Frame index 1 : Running float import *************
****************************************************
**   All the Tensor Dimensions has to be greater then Zero
**   DIM Error - For Tensor 96, Dim 2 is 0
****************************************************
WARNING: [TIDL_E_DATAFLOW_INFO_NULL] ti_cnnperfsim.out fails to allocate memory in MSMC. Please look into perfsim log. This model can only be used on PC emulation, it will get fault on target.
****************************************************
**          1 WARNINGS          0 ERRORS          **
****************************************************
The soft limit is 2048
The hard limit is 2048
MEM: Init ... !!!
MEM: Init ... Done !!!
 0.0s:  VX_ZONE_INIT:Enabled
 0.64s:  VX_ZONE_ERROR:Enabled
 0.70s:  VX_ZONE_WARNING:Enabled
 0.22075s:  VX_ZONE_INIT:[tivxInit:178] Initialization Done !!!
MEM: ERROR: Alloc failed. Invalid size: 0 bytes
 0.84757s:  VX_ZONE_ERROR:[tivxMemBufferAlloc:113] Memory was not allocated
 0.84764s:  VX_ZONE_ERROR:[ownAllocTensorBuffer:85] Could not allocate tensor memory
 0.84768s:  VX_ZONE_ERROR:[ownGraphAllocateDataObject:923] Memory allocation for data reference failed
 0.84773s:  VX_ZONE_ERROR:[vxVerifyGraph:2000] Memory alloc for data objects failed
 0.84776s:  VX_ZONE_ERROR:[vxVerifyGraph:2109] Graph verify failed
TIDL_RT_OVX: ERROR: Verifying TIDL graph ... Failed !!!
TIDL_RT_OVX: ERROR: Verify OpenVX graph failed

INFORMATION : Standard number of input dimensions is 4, given 3 [1, 1083, 91]-- Will be converted to [1, 1, 1083, 91] (NCHW format) internally

INFORMATION : Standard number of input dimensions is 4, given 3 [1, 600, 91]-- Will be converted to [1, 1, 600, 91] (NCHW format) internally

INFORMATION : Standard number of input dimensions is 4, given 3 [1, 150, 91]-- Will be converted to [1, 1, 150, 91] (NCHW format) internally

INFORMATION : Standard number of input dimensions is 4, given 3 [1, 54, 91]-- Will be converted to [1, 1, 54, 91] (NCHW format) internally

INFORMATION : Standard number of input dimensions is 4, given 3 [1, 24, 91]-- Will be converted to [1, 1, 24, 91] (NCHW format) internally

INFORMATION : Standard number of input dimensions is 4, given 3 [1, 6, 91]-- Will be converted to [1, 1, 6, 91] (NCHW format) internally
Warning : concat requires 4D input tensors - only 3 dims present..  Ignore if object detection network

 ************** Frame index 1 : Running float import *************
TIDL ALLOWLISTING LAYER CHECK: [TIDL_ConcatLayer] Concatenate in batch axis is not supported.
WARNING: [TIDL_E_DATAFLOW_INFO_NULL] ti_cnnperfsim.out fails to allocate memory in MSMC. Please look into perfsim log. This model can only be used on PC emulation, it will get fault on target.
****************************************************
**          1 WARNINGS          1 ERRORS          **
****************************************************

INFORMATION : Standard number of input dimensions is 4, given 3 [1, 1917, 4]-- Will be converted to [1, 1, 1917, 4] (NCHW format) internally

INFORMATION : Standard number of input dimensions is 4, given 3 [1, 1917, 91]-- Will be converted to [1, 1, 1917, 91] (NCHW format) internally
Warning : Requested Output Data Convert Layer is not Added to the network, It is currently not Optimal
Warning : Requested Output Data Convert Layer is not Added to the network, It is currently not Optimal
Warning : Requested Output Data Convert Layer is not Added to the network, It is currently not Optimal
Warning : Requested Output Data Convert Layer is not Added to the network, It is currently not Optimal

 ************** Frame index 1 : Running float import *************
WARNING: [TIDL_E_DATAFLOW_INFO_NULL] ti_cnnperfsim.out fails to allocate memory in MSMC. Please look into perfsim log. This model can only be used on PC emulation, it will get fault on target.
****************************************************
**          1 WARNINGS          0 ERRORS          **
****************************************************
INFO: Created TensorFlow Lite XNNPACK delegate for CPU.
 3.96625s:  VX_ZONE_ERROR:[ownTensorCheckSizes:189] Invalid view parameter(s) in dimension: 1
 3.96685s:  VX_ZONE_ERROR:[tivxUnmapTensorPatch:766] map address is null
 3.96692s:  VX_ZONE_ERROR:[tivxUnmapTensorPatch:770] map size is equal to 0
 3.96971s:  VX_ZONE_ERROR:[ownTensorCheckSizes:189] Invalid view parameter(s) in dimension: 1
 3.97027s:  VX_ZONE_ERROR:[tivxUnmapTensorPatch:766] map address is null
 3.97041s:  VX_ZONE_ERROR:[tivxUnmapTensorPatch:770] map size is equal to 0

It seems to me that there is an unaccepted operation, but it seems weird because I was able to compile them for SDK 8.6, so I don't understand.
Did you someone encounter this problem?

The other way to go that I have is to flash the newer SDK on the board, but I would like to stay on this one for compatibility with an older project.