Shared variables, real time issue

I'm not intimately familiar with the innards of C6Run, but I think I have a good guess at the underlying issue.  This sounds like a pretty typical cache coherence issue.  If the memory being allocated on the ARM side is cacheable (determined by the MMU settings) then you would have to perform a cache writeback operation prior to calling the DSP.  Alternatively you can allocate the memory as non-cacheable but that will hurt the ARM performance significantly if it interacts much with this area of memory.

Thank you for the reply,

I tried to disable MMU I found in documentation that I am supposed to use CP15 registers to configure MMU. But I can't find any documentation about these registers.

Concerning writeback operation, is it just a flag to activate somewhere, or do I have to write it myself?

Bruno,

I concur with Brad - this is a cache coherency issue.  Both the cache on the DSP and on the ARM are enabled and the C6Run framework is in charge of managing the cache as buffers are passed back and forth between the ARM and DSP (how the the cache is managed can be altered by using the INBUF, OUTBUF, INOUTBUF, or NONE flags).

Trying to disable the data cache on both sides is not likely to be what you want to do.  I think you need to reevaluate your usage of trying to alter the buffer contents on the ARM while it may be in use by the DSP - this usage scenario seems very atypical to me and is likely fraught with unexpected problems.

That being said, as the C6RUN_MEM calls use the CMEM component to allocate shared buffers, it can be configured to be not cacheable on the ARM side by altering the framework source and rebuilding.  The DSP side cache settings could also be altered by turning off the cache or by marking the shared memory (in external memory) as non-cacheable. I don't recommend this course of action and instead would ask that you provide more details about how and why you are doing things the way you are.

Regards, Daniel

Thank you for the rely,

I actually just want to update data on DSP side when changed on ARM side and vice versa. The solution I thought was simply to allocate data into shared memory from the ARM and pass the adress to the DSP, but it might be not the better solution according to what you said. Shall I use a writeback function to update data in shared memory from cache?

Regards, Bruno

Thank you for the link,

The use of INBUF/OUTBUF keywords is not appropriate in my case since there is a thread running on each processor and cache writeback is done before DSP function call, whereas it need to be done into the function.

Anyway I manage to update data on DSP side by writing a manual writeback on ARM side each time a variable change, and by executing invalide function in a loop on DSP side.

Thank you for the help.

Regards, Bruno.

Bruno,

Glad to be of help.  As a last point, if you are managing the cache for that buffer yourself, I would definitely use the NONE keyword to make sure the framework doesn't at any point try to do it for you.

Regards, Daniel