is the timing for the UPP port in the UPP UG figures 9 for receiver rising_edge UPP clock of falling edge UPP clk?
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is the timing for the UPP port in the UPP UG figures 9 for receiver rising_edge UPP clock of falling edge UPP clk?
In the data sheet for the C6748, figure 6-74 (pg 236), timing specs are given for data valid on the rising edge of the UPP clock. Is it the same when using the falling edge of the clock?