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I want to achieve Functional safety on c6x and c7x. I need to register some exception functions to detect possible errors, such as divide by zero and read illegal addresses. What do I need to configure?
Additionally, I would like to know which registers will be recorded when an exception occurs in c6x and c7x, and where are the manuals for c6x and c7x available? I couldn't find any relevant documents on ti.com.
Hi,
You can refer to our standard TRM (Technical Reference Manual) for SoC on which you are working in order to see related documentation regarding your posted issue.
You can look at chapter 3.18.4.5 Floating Point Instructions,
FPCR (Floating Point Configuration Register) has flag to enable divide by zero exception.
Since divide by 0 is an special condition, Its handling depends on whether the divide by zero exception is enabled, and is controlled by the bit DIV0EN in the FPCR.
• If FPCR.DIV0EN = 1, take exception and no result is written to the destination.
• If FPCR.DIV0EN=0, then the result is written to the destination as follows:
– unsigned value divide by 0: Quotient = Largest unsigned integer value, set FSR.SAT = 1
– positive value divide by 0: Quotient = Largest positive integer value, set FSR.SAT = 1
– negative value divide by 0: Quotient = Smallest negative integer value, set FSR.SAT=1
– 0/0: Quotient = 0, set FSR.SAT=1
Regards,
Pratik
Hi,
Here is the link for your reference : https://www.ti.com/product/TDA4VM?keyMatch=TDA4VM&tisearch=search-everything&usecase=GPN-ALT
Click on DRA829/TDA4VM Technical Reference Manual (Rev. C) for getting TRM.
In general if you want to look for TRM of any SoC, you can search the SoC name on ti.com, click on the product then similar to above link will pop up, under user guide section you will get TRM for the product.
--
Pratik