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C67X DSP Library

LUCENT-Has
Prodigy 50 points

Hi everybody,

I have a question on DSPLIB TI library for using  FFT. basically I am using DSPF_sp_fftSPxSP function and this works fine and I get correct FFT results, I want now to test and see if MULIT_PASS FFT can provide a better MIPS for higher FFT lengths (e.g. NFTT>1024), unfortunatley the results of FFT when run in multi-pass form is not correct.

all the data (input, twiddle factors and output buffers ) are correctly aligned as required by the TI document (8 bits aligned). I am wondering if anybody else has had similar experiences and has solved this (I did write a little C application and in my C project (which uses the C equivalent of library) I do get exactly similar results between single pass and multi pass FFT).

I have to admit that in the application I am working on , the cache is managed automatically (by BIOS) and I am wondering if there are tweaking needs to be done on the cache management when multi-pass FFT is used.

I appreciate your help and look forward to hearing from you guys.

Sincerely your,

Luhas

  • 0
    TI__Expert 8890 points

    Luhas,

    Sorry for my delay in responding.  Cache coherency could be a concern if you are using EDMA or some other component to read or write data buffers independently from the DSP.  To rule this out, I recommend adding the appropriate writeback/invalidate calls to your application.  For example, any time the DSP starts to work on a data buffer that may have been changed by EDMA, you should invalidate the cache on that buffer.  Similarly, after DSP processing is complete for a data buffer, the cache on that buffer should be written back.  BIOS provides APIs for both of these operations (either BCACHE for BIOSv5 or Cache for BIOSv6).

    Cache issues aside, it sounds like you are reporting that the multi-pass FFT computation fails when using the standard ASM-based library function but succeeds when using the C-equivalent function that's provided with the library source code.  Is my understanding correct?  If so, please share the exact version of the DSPLIB that you are using so that we can better investigate the issue.

    Hope this helps.

  • 0 in reply to Joe Coombs
    Intellectual 985 points

    Hi both,

     

    I was wondering whether this issue was resolved, as I'm having the same problem where single pass FFT works, but multi-pass does not.

    All my buffers are in L2 Shared RAM, so cache coherence should not be a problem in my situation.

    I'm using DSPLIB 3.1.1.1 on a C6748 LCDK kit.

     

    Thanks in advance.

     

    Kind regards,

     

    Remco Poelstra