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McASP Tx stops after emulator halt/start

Hi,

I'm debugging McASP 0 on the C6747 using the XDS100 v2 USB emulator and CCS 4.2.3. I load the app code on my custom board and run. The I2S audio data is received by the McASP Rx and retransmitted by the McASP Tx. But when I halt the emulator to check in/out buffers and then restart, McASP does not transmit anymore. Is there a reason?

Here is my setup:

I'm using the McASP CPU interrupt triggered by the RDATA and XDATA flags in the RSTAT and XSTAT registers. The ISR checks the RDATA flag and if 1 reads the Rx register. The ISR also checks the XDATA flag and if 1 writes a data word to the Tx register. All RSTAT and XSTAT flags are manually cleared after reading them.

I'm using continuous external clocks for bit clock and frame sync. The same clocks are sent to the Rx and Tx sections. I set the McASP operation to ASYNC because I don't want the bit clock to be inverted between the Rx and Tx sections. The bit clock is sent to the high-speed clock input and routed internally to the normal-speed clock section.

The McASP event is the only CPU activated IRQ in the interrupt controller.

After restarting the emulator and seeing that no data is being sent I halt again and always observe the following in the XSTAT register:

- XDATA flag never goes to 1

- XSTAFRM and XLAST are always 1 even though I'm configured in 2-slot TDM mode (for I2S data)

It will extremely hard to debug my application if I can't halt the DSP without killing the McASP Tx.

Please help.

Thanks.

SC

  • I'm adding a comment. I'm aware of the warning in the McASP documentation saying not to observe the XRBUF register with an open CCS window. In my case, the "Registers" window is not used. Does this suffice?

    Best regards,

    SC

  • scoutu75 said:
    But when I halt the emulator to check in/out buffers and then restart, McASP does not transmit anymore. Is there a reason?

    Halting the CPU interrupt servicing will cause an overrun/underrun condition in McASP. The McASP will automatically mute itself until the error conditions are properly handled.

  • As a follow up, you'll need to reset the McASP each time you halt if you service via CPU.

    The only way around this is to service the McASP by the EDMA3. If you do this, you can halt the CPU at any point and the McASP will be properly serviced.