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c6747 Boot pins (endian selection)

Hello,

I cannot find the documentation for the C6747 boot mode pins (only some boot pins are described in the boot loader docs).

The c6747 data sheet makes this reference:

"Boot decoding will be defined in the ROM datasheet."

Is this info available yet?  I am hoping to finish designing this PC board in the next few days. Am I too early for this DSP?

thanks,

-howy

 

  • The C6747 only supports little endian mode as shown in section 3.3 of the datasheet. The boot settings used in the C6747 are described in table A-1 of SPRAB04, note that not all boot pins are used by the current ROM boot loader of the C6747.

  • Bernie Thompson said:

    The C6747 only supports little endian mode as shown in section 3.3 of the datasheet. The boot settings used in the C6747 are described in table A-1 of SPRAB04, note that not all boot pins are used by the current ROM boot loader of the C6747.

    Thank you,

    I noticed that BOOT8 (IPU) is coincident with UART0_RXD which is always driven by an RS232 receiver in my design.

    I wonder if the undocumented boot pins will cause any odd behavior if they are not left in their default state during boot either now or for future revisions of this chip.

    -howy

  • The ROM boot loader only checks the pins shown in the ROM boot loader documentation, therefore other BOOT pins such as BOOT8 are ignored, at least in the current revision of the chip and ROM boot loader. It is possible that a future version of the chip will use additional BOOT pins but I do not foresee this happening any time soon if ever. This being said you are probably just fine as things are, but this could potentially be a problem some day if you want to move to a newer silicon rev that uses a newer ROM boot loader that checks additional BOOT pins.