TDA4VM: some questions about DSI display on linux

Hi,

    We have supported DSI on linux. 

    Our link : DSS->DSI->ub941->ub948->screen.

     Processor SDK version: 08_06_01_02.

    We define the following panel parameters in  "drivers\gpu\drm\panel\panel-simple.c", but we find that the DSI data lanes stay in ULP mode when we reduce the clock frequency to below 80MHz.

    1. Why a change of pixel clock frequency will cause no data on the DSI data lanes? What timing requirements do DSS have for the display of DSI?

    2. Another quesetion, thhe color displayed is not correct, sometimes it displays as "BGR" or “GBR“. It looks like there is timing error, can you give us some advice?

     Looking forward to your reply.

static const struct drm_display_mode panel_mode = {
		.clock = 80000,
		.hdisplay = 1280,
		.hsync_start = 1280 + 48,
		.hsync_end = 1280 + 48 + 112,
		.htotal = 1280 + 48 + 112 + 248,
		.vdisplay = 800,
		.vsync_start = 800 + 1,
		.vsync_end = 800 + 1 + 3,
		.vtotal = 800 + 1 + 3 + 50,

		.crtc_clock = 80000,
		.crtc_hdisplay = 1280,
		.crtc_hsync_start = 1280 + 48,
		.crtc_hsync_end = 1280 + 48 + 112,
		.crtc_htotal = 1280 + 48 + 112 + 248,
		.crtc_vdisplay = 800,
		.crtc_vsync_start = 800 + 1,
		.crtc_vsync_end = 800 + 1 + 3,
		.crtc_vtotal = 800 + 1 + 3 + 50,

		.flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
};