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[C6747] real benchmark for FFT

yl
Expert 1215 points

Hi,

Is there a real benchmark, instead of calculated cycle counts, of FFT on C67?

The theoretical benchmark of an 1024p complex FFT on a 300MHz Core is 15K (cycles) / 300M = 50 us

But the number I have seen is nearly 20 times slower. I am not expecting 50 us, but only  < 3~4 times slower.

  • CPU: C6747 @ 300MHz
  • DSPF_sp_fftSPxSP in C6000 DSPLib.

What can be wrong?

Thanks

  • 0
    TI__Guru 63830 points

    Something to check is if you have the L2 cache enabled and whether your program initializes the Memory Attribute Registers (MARn) set to configure external memory as cacheable.

    If you are using DSP/BIOS, I believe DSP/BIOS will enable the L2 cache.  However, I don't believe it does anything specific with the MAR registers.  Therefore, if you have any of the DSPLIB kernel, or the data buffers it uses in external memory, these will not be cached unless the appropriate MARn registers are set.
    The MARn registers are discussed in the TMS320C674x DSP Megamodule Reference Guide (SPRUFK5).
    I would also suggest referencing the TMS320C674x DSP Cache User's Guide (SPRUG82).

    In addition, the configuration of the EMIF settings will also come into play, but I would check the above items first.