TMS320C5515 eZdsp USB Stick&Code Composer Studio&code running in FLASH

Ville Pulkkinen

Other Parts Discussed in Thread: TMS320C5515

Hello!

I am evaluating TMS320C5515 eZdsp USB Stick. I ran successfully some benchmark tests in RAM (I applied Debug As -> Debug Session).

But: I tried to run the previous benchmark tests in FLASH (again I applied Debug As -> Debug Session) but I met problems with the debugger (compiling&linking went fine).

I applied the same GEL file for the both (RAM&FLASH) tests.

I got the following error messages:

"C55xx: Loader: One or more sections of your program falls into a memory region that is not writable. These regions will not actually be written to the target. Check your linker configuration and/or memory map.

C55xx: File Loader: Data verification failed at address 0x00FE0000 Please verify target memory and memory map.

Error found during data verification.

Ensure the linker command file matches the memory map."

My point of view is that GEL file had correct memory areas.

What is wrong with my system? Need I flash my code into FLASH memory by different method or?

Ville

over 14 years ago

0 Juliana Mansell over 14 years ago

TI__Intellectual 1755 points

What is the value of the MPNMC bit field of the ST3 status register? If it is cleared, that address range is reserved for the on-chip ROM. See details from the data sheet below (from section 3.2.3 On-Chip Read-Only Memory (ROM))

" The zero-wait-state ROM is located at the byte address range FE0000h – FFFFFFh. The ROM is composed of four 16K-word blocks, for a total of 128K bytes of ROM. The ROM address space can be mapped by software to the external memory or to the internal ROM. The standard device includes a Bootloader program resident in the ROM. When the MPNMC bit field of the ST3 status register is cleared (by default), the byte address range FE0000h – FFFFFFh is reserved for the on-chip ROM. When the MPNMC bit field of the ST3 status register is set through software, the on-chip ROM is disabled and not present in the memory map, and byte address range FE0000h – FFFFFFh is unmapped. A hardware reset always clears the MPNMC bit, so it is not possible to disable the ROM at reset. However, the software reset instruction does not affect the MPNMC bit. The ROM can be accessed by the program and data buses. Each on-chip ROM block is a one cycle per word access memory. "

0 Ville Pulkkinen over 14 years ago in reply to Juliana Mansell

Prodigy 20 points

Hello again!

The value of the MPNMC bit field of the ST3 status register was "0 - Boot ROM is Enabled (0x0)"

My aim is to drive program code in FLASH ROM.

I included a linker command file and a GEL file.

Ville

Fullscreen 4331.usbstk5515.gel.txt Download

/********************************************************************/
/* usbstk5515.gel                                                   */
/* Version 1.00                                                     */
/*                                                                  */
/* This GEL file is to be used with the 5515 eZDSP USB STICK.       */
/* Changes may be required to support specific hardware designs.    */
/*                                                                  */
/* Code Composer Studio supports six reserved GEL functions that    */
/* automatically get executed if they are defined. They are:        */
/*                                                                  */
/* StartUp()              - Executed whenever CCS is invoked        */
/* OnReset()              - Executed after Debug->Reset CPU         */
/* OnRestart()            - Executed after Debug->Restart           */
/* OnPreFileLoaded()      - Executed before File->Load Program      */
/* OnFileLoaded()         - Executed after File->Load Program       */
/* OnTargetConnect()      - Executed after Debug->Connect           */
/*                                                                  */
/*   Version History                                                */
/*     v0.01        Initial Release                                 */
/*     v1.00        Added PLL frequencies                           */
/********************************************************************/
StartUp()
{
    c5515_MapInit();
}

/*--------------------------------------------------------------*/
/* OnTargetConnect() -- this function is called after a target  */
/* connect.                                                     */
/*--------------------------------------------------------------*/
OnTargetConnect()
{
    GEL_Reset();
    Peripheral_Reset();
    // ProgramPLL_100MHz(); orig.
    // ProgramPLL_60MHz(); orig.
    ProgramPLL_7_5MHz();
    //ProgramPLL_15MHz();
    GEL_TextOut("Target Connection Complete.\n"); 
}

/*--------------------------------------------------------------*/
/* OnPreFileLoaded()                                            */
/* This function is called automatically when the 'Load Program'*/
/* Menu item is selected.                                       */
/*--------------------------------------------------------------*/
OnPreFileLoaded()
{
    /* Reset the CPU to clean up state */
    //GEL_Reset();

    //XINTF_Enable(); // lis�tty j�lkik�teen

}

/*--------------------------------------------------------------*/
/* OnRestart()                                                  */
/* This function is executed before a file is restarted. Disable*/
/* interrupts and DMA from the current program so pending       */
/* events and transfers don't interfere with the new program.   */
/*--------------------------------------------------------------*/
OnRestart()
{
    /* Disable interrupts */
    *(int*)0x0003 = *(int*)0x0003 | 0x0800; // Set INTM
    *(int*)0x0000 = 0;      // Clear IER0
    *(int*)0x0000 = 0;      // Clear IER1
}

/*--------------------------------------------------------------*/
/* OnReset()                                                    */
/* This function is called by CCS when you do Debug->Resest.    */
/* The goal is to put the C55xx into a known good state with    */
/* respect to cache, dma and interrupts.                        */
/*--------------------------------------------------------------*/
OnReset( int nErrorCode )
{
}

/*--------------------------------------------------------------*/
/* OnFileLoaded()                                               */
/* This function is called by CCS when you do File->Load Program*/
/* The goal is to do in post file loaded configuration that may */
/* be needed.                                                   */
/*--------------------------------------------------------------*/
OnFileLoaded()
{
}

#define ESCR     0x1c33

#define SDTIMR1  0x1020 
#define SDTIMR2  0x1021 
#define SDCR1    0x1008 
#define SDCR2    0x1009
#define SDSRETR  0x103C
#define SDRCR    0x100C

#define PRCR     0x1C05 
#define PCGCR1   0x1c02
#define PCGCR2   0x1c03
#define PSRCR    0x1c04 

#define CLKCFGL  0x1c1e
#define CCR2     0x1c1f
#define CGCR1    0x1c20
#define CGCR2    0x1c21
#define CGCR3    0x1c22
#define CGCR4    0x1c23
#define CCSSR    0x1c24
#define IVPD     0x0049


// ***************************************************************************

/* Memory map based on MP/MC value (assume MP/MC = 0).    */
c5515_MapInit() {
    GEL_MapOn();
    GEL_MapReset();

    /*Program Space*/

    /* DARAM */
    GEL_MapAdd(0x0000C0,0,0x001F40,1,1);    /* DARAM0 */
    GEL_MapAdd(0x002000,0,0x002000,1,1);    /* DARAM1 */
    GEL_MapAdd(0x004000,0,0x002000,1,1);    /* DARAM2 */
    GEL_MapAdd(0x006000,0,0x002000,1,1);    /* DARAM3 */
    GEL_MapAdd(0x008000,0,0x002000,1,1);    /* DARAM4 */
    GEL_MapAdd(0x00A000,0,0x002000,1,1);    /* DARAM5 */
    GEL_MapAdd(0x00C000,0,0x002000,1,1);    /* DARAM6 */
    GEL_MapAdd(0x00E000,0,0x002000,1,1);    /* DARAM7 */

    /* SARAM */
    GEL_MapAdd(0x010000,0,0x002000,1,1);    /* SARAM0 */
    GEL_MapAdd(0x012000,0,0x002000,1,1);    /* SARAM1 */
    GEL_MapAdd(0x014000,0,0x002000,1,1);    /* SARAM2 */
    GEL_MapAdd(0x016000,0,0x002000,1,1);    /* SARAM3 */
    GEL_MapAdd(0x018000,0,0x002000,1,1);    /* SARAM4 */
    GEL_MapAdd(0x01A000,0,0x002000,1,1);    /* SARAM5 */
    GEL_MapAdd(0x01C000,0,0x002000,1,1);    /* SARAM6 */
    GEL_MapAdd(0x01E000,0,0x002000,1,1);    /* SARAM7 */
    GEL_MapAdd(0x020000,0,0x002000,1,1);    /* SARAM8 */
    GEL_MapAdd(0x022000,0,0x002000,1,1);    /* SARAM9 */
    GEL_MapAdd(0x024000,0,0x002000,1,1);    /* SARAM10 */
    GEL_MapAdd(0x026000,0,0x002000,1,1);    /* SARAM11 */
    GEL_MapAdd(0x028000,0,0x002000,1,1);    /* SARAM12 */
    GEL_MapAdd(0x02A000,0,0x002000,1,1);    /* SARAM13 */
    GEL_MapAdd(0x02C000,0,0x002000,1,1);    /* SARAM14 */
    GEL_MapAdd(0x02E000,0,0x002000,1,1);    /* SARAM15 */
    GEL_MapAdd(0x030000,0,0x002000,1,1);    /* SARAM16 */
    GEL_MapAdd(0x032000,0,0x002000,1,1);    /* SARAM17 */
    GEL_MapAdd(0x034000,0,0x002000,1,1);    /* SARAM18 */
    GEL_MapAdd(0x036000,0,0x002000,1,1);    /* SARAM19 */
    GEL_MapAdd(0x038000,0,0x002000,1,1);    /* SARAM20 */
    GEL_MapAdd(0x03A000,0,0x002000,1,1);    /* SARAM21 */
    GEL_MapAdd(0x03C000,0,0x002000,1,1);    /* SARAM22 */
    GEL_MapAdd(0x03E000,0,0x002000,1,1);    /* SARAM23 */
    GEL_MapAdd(0x040000,0,0x002000,1,1);    /* SARAM24 */
    GEL_MapAdd(0x042000,0,0x002000,1,1);    /* SARAM25 */
    GEL_MapAdd(0x044000,0,0x002000,1,1);    /* SARAM26 */
    GEL_MapAdd(0x046000,0,0x002000,1,1);    /* SARAM27 */
    GEL_MapAdd(0x048000,0,0x002000,1,1);    /* SARAM28 */
    GEL_MapAdd(0x04A000,0,0x002000,1,1);    /* SARAM29 */
    GEL_MapAdd(0x04C000,0,0x002000,1,1);    /* SARAM30 */
    GEL_MapAdd(0x04E000,0,0x002000,1,1);    /* SARAM31 */

    /* External-Memory */
    GEL_MapAdd(0x050000,0,0x7B0000,1,1);    /* External-SDRAM */
    GEL_MapAdd(0x800000,0,0x400000,1,1);    /* External-Async */
    GEL_MapAdd(0xC00000,0,0x200000,1,1);    /* External-Async */
    GEL_MapAdd(0xE00000,0,0x100000,1,1);    /* External-Async */
    GEL_MapAdd(0xF00000,0,0x0E0000,1,1);    /* External-Async */

    /* ROM */
    GEL_MapAdd(0xFE0000,0,0x008000,1,0);    
    GEL_MapAdd(0xFE8000,0,0x008000,1,0);     
    GEL_MapAdd(0xFF0000,0,0x008000,1,0);    
    GEL_MapAdd(0xFF8000,0,0x008000,1,0);


    /* Data Space */

    /* DARAM */
    GEL_MapAdd(0x000000,1,0x000060,1,1);    /* MMRs */
    GEL_MapAdd(0x000060,1,0x000FA0,1,1);    /* DARAM0 */
    GEL_MapAdd(0x001000,1,0x001000,1,1);    /* DARAM1 */
    GEL_MapAdd(0x002000,1,0x001000,1,1);    /* DARAM2 */
    GEL_MapAdd(0x003000,1,0x001000,1,1);    /* DARAM3 */
    GEL_MapAdd(0x004000,1,0x001000,1,1);    /* DARAM4 */
    GEL_MapAdd(0x005000,1,0x001000,1,1);    /* DARAM5 */
    GEL_MapAdd(0x006000,1,0x001000,1,1);    /* DARAM6 */
    GEL_MapAdd(0x007000,1,0x001000,1,1);    /* DARAM7 */

    /* SARAM */
    GEL_MapAdd(0x008000,1,0x001000,1,1);    /* SARAM0 */
    GEL_MapAdd(0x009000,1,0x001000,1,1);    /* SARAM1 */
    GEL_MapAdd(0x00A000,1,0x001000,1,1);    /* SARAM2 */
    GEL_MapAdd(0x00B000,1,0x001000,1,1);    /* SARAM3 */
    GEL_MapAdd(0x00C000,1,0x001000,1,1);    /* SARAM4 */
    GEL_MapAdd(0x00D000,1,0x001000,1,1);    /* SARAM5 */
    GEL_MapAdd(0x00E000,1,0x001000,1,1);    /* SARAM6 */
    GEL_MapAdd(0x00F000,1,0x001000,1,1);    /* SARAM7 */
    GEL_MapAdd(0x010000,1,0x001000,1,1);    /* SARAM8 */
    GEL_MapAdd(0x011000,1,0x001000,1,1);    /* SARAM9 */
    GEL_MapAdd(0x012000,1,0x001000,1,1);    /* SARAM10 */
    GEL_MapAdd(0x013000,1,0x001000,1,1);    /* SARAM11 */
    GEL_MapAdd(0x014000,1,0x001000,1,1);    /* SARAM12 */
    GEL_MapAdd(0x015000,1,0x001000,1,1);    /* SARAM13 */
    GEL_MapAdd(0x016000,1,0x001000,1,1);    /* SARAM14 */
    GEL_MapAdd(0x017000,1,0x001000,1,1);    /* SARAM15 */
    GEL_MapAdd(0x018000,1,0x001000,1,1);    /* SARAM16 */
    GEL_MapAdd(0x019000,1,0x001000,1,1);    /* SARAM17 */
    GEL_MapAdd(0x01A000,1,0x001000,1,1);    /* SARAM18 */
    GEL_MapAdd(0x01B000,1,0x001000,1,1);    /* SARAM19 */
    GEL_MapAdd(0x01C000,1,0x001000,1,1);    /* SARAM20 */
    GEL_MapAdd(0x01D000,1,0x001000,1,1);    /* SARAM21 */
    GEL_MapAdd(0x01E000,1,0x001000,1,1);    /* SARAM22 */
    GEL_MapAdd(0x01F000,1,0x001000,1,1);    /* SARAM23 */
    GEL_MapAdd(0x020000,1,0x001000,1,1);    /* SARAM24 */
    GEL_MapAdd(0x021000,1,0x001000,1,1);    /* SARAM25 */
    GEL_MapAdd(0x022000,1,0x001000,1,1);    /* SARAM26 */
    GEL_MapAdd(0x023000,1,0x001000,1,1);    /* SARAM27 */
    GEL_MapAdd(0x024000,1,0x001000,1,1);    /* SARAM28 */
    GEL_MapAdd(0x025000,1,0x001000,1,1);    /* SARAM29 */
    GEL_MapAdd(0x026000,1,0x001000,1,1);    /* SARAM30 */
    GEL_MapAdd(0x027000,1,0x001000,1,1);    /* SARAM31 */

    /* External-Memory */
    GEL_MapAdd(0x028000,1,0x3D8000,1,1);    /* External-SDRAM */
    GEL_MapAdd(0x400000,1,0x200000,1,1);    /* External-Async */
    GEL_MapAdd(0x600000,1,0x100000,1,1);    /* External-Async */
    GEL_MapAdd(0x700000,1,0x080000,1,1);    /* External-Async */
    GEL_MapAdd(0x780000,1,0x070000,1,1);    /* External-Async */

    /* ROM */
    GEL_MapAdd(0x7F0000,1,0x004000,1,0);    /* SAROM0 */
    GEL_MapAdd(0x7F4000,1,0x004000,1,0);    /* SAROM1 */
    GEL_MapAdd(0x7F8000,1,0x004000,1,0);    /* SAROM2 */
    GEL_MapAdd(0x7FC000,1,0x004000,1,0);    /* SAROM3 */

    /* IO Space */
    GEL_MapAdd(0x0000,2,0xFFFF,1,1);        /* XPORT */
}

Peripheral_Reset()
{
    int i;

    *(short *)PSRCR@IO = 0x0020;
    *(short *)PRCR@IO  = 0x00BB;

    for(i=0;i<0xff;i++);
    *(short *)IVPD@data = 0x027F; // Load interrupt vector pointer
    GEL_TextOut("Reset Peripherals is complete.\n");
}

ProgramPLL_100MHz() {
    int i;

    GEL_TextOut("Configuring PLL (100 MHz).\n");
    /* Enable clocks to all peripherals */
    *(short *)PCGCR1@IO = 0x0;
    *(short *)PCGCR2@IO = 0x0;

    /* Bypass PLL */
    *(short *)CCR2@IO = 0x0;

    /* Set CLR_CNTL = 0 */
    *(short *)CGCR1@IO = *(short *)CGCR1@IO & 0x7FFF;

    *(short *)CGCR1@IO =  0x8BE8;
    *(short *)CGCR2@IO =  0x8000;
    *(short *)CGCR3@IO =  0x0806;
    *(short *)CGCR4@IO =  0x0000; 

    /* Wait for PLL lock */
    for(i=0;i<0x7fff;i++);

    /* Switch to PLL clk */ 
    *(short *)CCR2@IO = 0x1;

    GEL_TextOut("PLL Init Done.");
    
}

ProgramPLL_120MHz() {
    int i;

    GEL_TextOut("Configuring PLL (120 MHz).\n");
    /* Enable clocks to all peripherals */
    *(short *)PCGCR1@IO = 0x0;
    *(short *)PCGCR2@IO = 0x0;

    /* Bypass PLL */
    *(short *)CCR2@IO = 0x0;

    /* Set CLR_CNTL = 0 */
    *(short *)CGCR1@IO = *(short *)CGCR1@IO & 0x7FFF;

    *(short *)CGCR1@IO =  0x8E4B;
    *(short *)CGCR2@IO =  0x8000;
    *(short *)CGCR3@IO =  0x0806;
    *(short *)CGCR4@IO =  0x0000; 

    /* Wait for PLL lock */
    for(i=0;i<0x7fff;i++);

    /* Switch to PLL clk */ 
    *(short *)CCR2@IO = 0x1;

    GEL_TextOut("PLL Init Done.");  
}

ProgramPLL_60MHz() {
    int i;

    GEL_TextOut("Configuring PLL (60 MHz).\n");
    /* Enable clocks to all peripherals */
    *(short *)PCGCR1@IO = 0x0;
    *(short *)PCGCR2@IO = 0x0;

    /* Bypass PLL */
    *(short *)CCR2@IO = 0x0;

    /* Set CLR_CNTL = 0 */
    *(short *)CGCR1@IO = *(short *)CGCR1@IO & 0x7FFF;

    *(short *)CGCR1@IO =  0x8724;
    *(short *)CGCR2@IO =  0x8000;
    *(short *)CGCR3@IO =  0x0806;
    *(short *)CGCR4@IO =  0x0000; 

    /* Wait for PLL lock */
    for(i=0;i<0x7fff;i++);

    /* Switch to PLL clk */ 
    *(short *)CCR2@IO = 0x1;

    GEL_TextOut("PLL Init Done.");  
}

ProgramPLL_7_5MHz() {
    int i;

    GEL_TextOut("Configuring PLL (7,5 MHz).\n");
    /* Enable clocks to all peripherals */
    *(short *)PCGCR1@IO = 0x0;
    *(short *)PCGCR2@IO = 0x0;

    /* Bypass PLL */
    *(short *)CCR2@IO = 0x0;

    /* Set CLR_CNTL = 0 */
    *(short *)CGCR1@IO = *(short *)CGCR1@IO & 0x7FFF;

    *(short *)CGCR1@IO =  0x80e0; // arvolla 0x81c7 saadaan 15.0401 MHz, arvlla 0x81c6 saadaan 14.9746 MHz, arvolla 0x80e0 7.47092 MHz 
    *(short *)CGCR2@IO =  0x8000;
    *(short *)CGCR3@IO =  0x0806;
    *(short *)CGCR4@IO =  0x0000; 

    /* Wait for PLL lock */
    for(i=0;i<0x7fff;i++);

    /* Switch to PLL clk */ 
    *(short *)CCR2@IO = 0x1;

    GEL_TextOut("PLL Init Done.");  
}

ProgramPLL_15MHz() {
    int i;

    GEL_TextOut("Configuring PLL (15 MHz).\n");
    /* Enable clocks to all peripherals */
    *(short *)PCGCR1@IO = 0x0;
    *(short *)PCGCR2@IO = 0x0;

    /* Bypass PLL */
    *(short *)CCR2@IO = 0x0;

    /* Set CLR_CNTL = 0 */
    *(short *)CGCR1@IO = *(short *)CGCR1@IO & 0x7FFF;

    *(short *)CGCR1@IO =  0x81c6; // arvolla 0x81c7 saadaan 15.0401 MHz, arvlla 0x81c6 saadaan 14.9746 MHz, arvolla 0x80e0 7.47092 MHz 
    *(short *)CGCR2@IO =  0x8000;
    *(short *)CGCR3@IO =  0x0806;
    *(short *)CGCR4@IO =  0x0000; 

    /* Wait for PLL lock */
    for(i=0;i<0x7fff;i++);

    /* Switch to PLL clk */ 
    *(short *)CCR2@IO = 0x1;

    GEL_TextOut("PLL Init Done.");  
}

Fullscreen 3872.lnk.cmd.txt Download

/******************************************************************************/
/* LNKX.CMD - COMMAND FILE FOR LINKING C PROGRAMS IN LARGE/HUGE MEMORY MODEL  */
/*                                                                            */
/* Usage:                                                                     */
/*  cl55 <src files> -z -o<out file> -m<map file> lnkx.cmd -l<RTS library>   */
/*                                                                            */
/* Description: This file is a sample command file that can be used for       */
/*              linking programs built with the C Compiler.  Use it as a      */
/*              guideline; you  may want to change the allocation scheme      */
/*              according to the size of your program and the memory layout   */
/*              of your target system.                                        */
/*                                                                            */
/*   Notes: (1) You must specify the directory in which <RTS library> is      */
/*              located.  Either add a "-i<directory>" line to this file      */
/*              file, or use the system environment variable C55X_C_DIR to    */
/*              specify a search path for the libraries.                      */
/*                                                                            */
/******************************************************************************/

-stack    0x2000      /* Primary stack size   */
-sysstack 0x1000      /* Secondary stack size */
-heap     0x2000      /* Heap area size       */

-c                    /* Use C linking conventions: auto-init vars at runtime */
-u _Reset             /* Force load of reset interrupt handler                */

/* SPECIFY THE SYSTEM MEMORY MAP */

MEMORY
{
 PAGE 0:  /* ---- Unified Program/Data Address Space ---- */

  MMR    (RWIX): origin = 0x000000, length = 0x0000c0  /* MMRs */
  DARAM0 (RWIX): origin = 0x0000c0, length = 0x00ff40  /*  64KB - MMRs */
  SARAM0 (RWIX): origin = 0x010000, length = 0x010000  /*  64KB */
  SARAM1 (RWIX): origin = 0x020000, length = 0x020000  /* 128KB */
  SARAM2 (RWIX): origin = 0x040000, length = 0x00FE00  /*  64KB */
  VECS   (RWIX): origin = 0x04FE00, length = 0x000200  /*  512B */
  PDROM  (RIX) : origin = 0xfe0000, length = 0x010000  /*  64KB */
  
 PAGE 2:  /* -------- 64K-word I/O Address Space -------- */

  IOPORT (RWI) : origin = 0x000000, length = 0x020000
}

/* SPECIFY THE SECTIONS ALLOCATION INTO MEMORY */

SECTIONS
{
   .text     > PDROM 

   /* Both stacks must be on same physical memory page               */
   .stack    >  DARAM0                /* Primary system stack        */
   .sysstack >  DARAM0                /* Secondary system stack      */

   .data     >> DARAM0|SARAM0|SARAM1  /* Initialized vars            */
   .bss      >> DARAM0|SARAM0|SARAM1  /* Global & static vars        */
   .const    >> DARAM0|SARAM0|SARAM1  /* Constant data               */
   .sysmem   >  DARAM0|SARAM0|SARAM1  /* Dynamic memory (malloc)     */
   .switch   >  SARAM2                /* Switch statement tables     */
   .cinit    >  SARAM2                /* Auto-initialization tables  */
   .pinit    >  SARAM2                /* Initialization fn tables    */
   .cio      >  SARAM2                /* C I/O buffers               */
   .args     >  SARAM2                /* Arguments to main()         */

    vectors  >  VECS                  /* Interrupt vectors           */

   .ioport   >  IOPORT PAGE 2         /* Global & static ioport vars */
}

0 Vladimir Shubin over 13 years ago in reply to Ville Pulkkinen

Prodigy 100 points

Hello, Ville!

I wrote: " .text > PDROM " in GEL file.

I got the following error message: C55xx: File Loader: Data verification failed at address 0x00FE0000.

Would you like to help me to decide this problem ?

Best Regards,

Vladimir.

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TMS320C5515 eZdsp USB Stick&Code Composer Studio&code running in FLASH