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TDA4VH-Q1: Low probability of DDR handshake failure during TDA4VH chip startup

Part Number: TDA4VH-Q1
Other Parts Discussed in Thread: TDA4VH

Hi  TI expert

    Recently, we encountered a phenomenon of DDR handshake failure during TDA4VH chip startup during debugging.The probability of occurrence is very small,The debugging board undergoes repeated power on and off tests, with an average of once every 1-2 days(The test board is powered on and off approximately 1200 times a day).

   The error printing information is as follows:

   U-Boot SPL 2021.01-svn443951 (May 15 2023 - 11:24:23 +0800)

   SYSFW ABI: 3.1 (firmware rev 0x0008 '8.6.3--v08.06.03 (Chill Capybar')

   Timeout during frequency handshake

   ### ERROR ### Please RESET the board ###

In addition, the schematic design and PCB design of the DDR part refer to the demo board, and after inspection, there is no difference;The TDA4VH chip is connected to four 2GB LPDDR4 chips.

If experts have any ideas, please help provide some. Thank you very much!

Best regards !