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Original question:

AM6442: HS400 DDR Support on MMCSD0

AM6442: HS400 DDR is working well on the TMDS64GPEVM

Hideaki Matsumoto
Genius 9050 points
Part Number: AM6442

Hi,

We got the following answer on the following e2e thread.

--------------------------

HS400 is not supported.

Please use the datasheet https://www.ti.com/lit/gpn/am6442 or html https://www.ti.com/document-viewer/AM6442/datasheet/GUID-F75A69C6-17BB-4819-946A-FC06602B3DC6#TITLE-SPRSP56INT_SPRS932_CH06_00034 for definition of supported features. I will file a bug on the EVM User's Guide.

https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1257831/am6442-hs400-ddr-support-on-mmcsd0/4761278#4761278

--------------------------

However, it seems that eMMC is actually working at HS400 DDR mode on the TMDS64GPEVM.

Can the customer use MMCSD0 Host controller as HS400 DDR mode ?  Could you explain why HS400 is not supported ?  Did you find any issue at the test of this mode ?

Here is the output by confirming via U-Boot.

=> mmc info

Device: mmc@fa10000

Manufacturer ID: 13

OEM: 14e

Name: S0J56

Bus Speed: 200000000

Mode: HS400 (200MHz)

Rd Block Len: 512

MMC version 5.1

High Capacity: Yes

Capacity: 14.8 GiB

Bus Width: 8-bit DDR

Erase Group Size: 512 KiB

HC WP Group Size: 8 MiB

User Capacity: 14.8 GiB WRREL

Boot Capacity: 31.5 MiB ENH

RPMB Capacity: 4 MiB ENH

Boot area 0 is not write protected

Boot area 1 is not write protected

=>

Thanks and regards,
Hideaki

  • 0
    TI__Guru* 83745 points

    Hello Matsumoto-san

    I will assign this to our hardware expert but I do not really understand this line of questioning. Our datasheet is the "authority" on what operating speeds, electrical characteristics and max frequencies we support. 

    A single unit on a single EVM working on nom conditions does not imply that it can work across the entire process, voltage and temperature spectrum that the device supports. 

    So the supported/not supported inference cannot be drawn from one unit being functional. 

    Regards

    Mukul 

  • +1 in reply to Mukul Bhatnagar
    TI__Guru 62855 points

    The AM64x design team was not able to close timing with enough margin across all operating points of Process, Voltage, and Temperature (PVT) to support HS400 on MMC0. Therefore, HS400 was descoped before we released our first draft datasheet in April of 2020.  As Mukul mentioned, you may find it works with limited operating conditions. TI does not recommend using HS400 on AM64x in a production product.

    Regards,
    Paul