• State Resolved
  • Locked Locked
  • Replies 13 replies
  • Answers 1 answer
  • Subscribers 98 subscribers
  • Views 502 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

Original question:

DRA821U: Leverage firewall to block Cortex-R5's access to DDR/SRAM

DRA821U: What are the valid regions for firewall 4760 and 4761

liangliang
Prodigy 40 points
Part Number: DRA821U
Other Parts Discussed in Thread: DRA821

Hi, Ti,

We now need to configure firewall 4760/4761 to protect certain range of SRAM memory from being accessed.

Therefore, we need to know the valid regions for these 2 firewalls.

From the SDK (ti-processor-sdk-rtos-j7200-evm-09_00_00_07/pdk_j7200_09_00_00_45/packages/ti/csl/soc/j7200/src/csl_soc_firewalls.h) ,

we could find that the valid regions for 4760 and 4761 are both 0x60000000 ~ 0x7fffffff, as shown in the code snippet below,

/* Properties of firewall at slave: NAVSS0_VIRTSS_NB_SLV0_MEM0 */
#define CSL_STD_FW_NAVSS0_VIRTSS_NB_SLV0_MEM0_ID                                                   (4760U)
#define CSL_STD_FW_NAVSS0_VIRTSS_NB_SLV0_MEM0_TYPE                                                 (CSL_FW_SECURITY)
#define CSL_STD_FW_NAVSS0_VIRTSS_NB_SLV0_MEM0_MMR_BASE                                             (0x000000454a6000U)
#define CSL_STD_FW_NAVSS0_VIRTSS_NB_SLV0_MEM0_NUM_REGIONS                                          (24U)
#define CSL_STD_FW_NAVSS0_VIRTSS_NB_SLV0_MEM0_NUM_PRIV_IDS_PER_REGION                              (3U)
#define CSL_STD_FW_NAVSS0_VIRTSS_NB_SLV0_MEM0_NB_SLV0_MEM0_START                                   (0x00000060000000U)
#define CSL_STD_FW_NAVSS0_VIRTSS_NB_SLV0_MEM0_NB_SLV0_MEM0_END                                     (0x0000007fffffffU)

/* Properties of firewall at slave: NAVSS0_VIRTSS_NB_SLV1_MEM0 */
#define CSL_STD_FW_NAVSS0_VIRTSS_NB_SLV1_MEM0_ID                                                   (4761U)
#define CSL_STD_FW_NAVSS0_VIRTSS_NB_SLV1_MEM0_TYPE                                                 (CSL_FW_SECURITY)
#define CSL_STD_FW_NAVSS0_VIRTSS_NB_SLV1_MEM0_MMR_BASE                                             (0x000000454a6400U)
#define CSL_STD_FW_NAVSS0_VIRTSS_NB_SLV1_MEM0_NUM_REGIONS                                          (24U)
#define CSL_STD_FW_NAVSS0_VIRTSS_NB_SLV1_MEM0_NUM_PRIV_IDS_PER_REGION                              (3U)
#define CSL_STD_FW_NAVSS0_VIRTSS_NB_SLV1_MEM0_NB_SLV1_MEM0_START                                   (0x00000060000000U)
#define CSL_STD_FW_NAVSS0_VIRTSS_NB_SLV1_MEM0_NB_SLV1_MEM0_END                                     (0x0000007fffffffU)

But, when we try configuring firewall with those regions, we got error "ERROR:   Failed to get response (-19)".

And if we change the region to other values, i.e, 0x70000000 ~ 0x7001ffff or 0x70000000 ~ 0x700effff, the configuration succeeds.

So could you kindly please answer about the valid regions for these two firewalls?

Regards,

Liang Liang

  • 0
    TI__Guru 57115 points

    Hi Liang 

    Though the valid range is 0x00000060000000U - 0x0000007fffffffU some of the region is already configured by TIFS 

    reference - J7200 Firewall Descriptions — TISCI User Guide

    So, if you trying to set the background region you may see some issue as it is already configured by TIFS.

    Regards
    Diwakar

  • 0 in reply to Diwakar Dhyani
    Prodigy 40 points

    Hi, Diwakar,

    Diwakar Dhyani said:
    So, if you trying to set the background region you may see some issue as it is already configured by TIFS.

    You're right. We got this problem when we tried configuring background firewall for region 0 of fwl 4760.

    But according to J7200 DRA821 TRM,  the background regions could have overlapping addresses with foreground ones

    (I guess all regions configured by TIFS are foreground regions)

    Could you please elaborate more on why there're issues when setting the background region?

    Regards,

    Liang

  • 0 in reply to liangliang
    TI__Guru 57115 points

    Hi Liang,

    If you see the above attached screenshot region 0 for both 4760 and 4761 is already configured by TIFS which is background region.

    Regards
    Diwakar

  • 0 in reply to Diwakar Dhyani
    Prodigy 40 points

    Hi, Diwakar,

    I did check the screenshot above and understand that the region 0 is already configured by TIFS.

    In our case, we changed the region owner of fwl 4760 and overwrote its configuration to a new background one.

    I think overwriting the region0 of fwl with a new background region is a valid operation.

    We actually could configure fwl successfully when the region is 0x70000000~0x700effff.

    I must have missed something, but i still couldn't understand why

    configuring 4760 region 0 with 0x60000000 ~ 0x7fffffff fails.

    Thanks. It's really nice of you to reply.

    Regards,

    Liang

  • +1 in reply to liangliang
    TI__Guru 57115 points

    Hi Liang 

    But the region 22 and 23 is owned by TIFS and you can't reconfigure that region.

    That is why you are facing issue can you exclude the 22 and 23 region and see if you are able to set it.

    Regards
    Diwakar

  • 0 in reply to Diwakar Dhyani
    Prodigy 40 points

    Hi, Diwakar,

    We didn't reconfigure region 22 and region 23. It is only the region 0 of 4760 that we reconfigured.

    Regards,

    Liang

  • 0 in reply to liangliang
    TI__Guru 57115 points

    Hi Liang 

    When you trying to configure the region 0 for address range 0x60000000 ~ 0x7fffffff you are trying to modify the some of the range fall under region 22 and 23.

    So asked to try to configure the range excluding the range covered by region 22 and 23.

    Regards
    Diwakar

  • 0 in reply to Diwakar Dhyani
    Prodigy 40 points

    Hi, Diwakar,

    We tried configuring region 0 with address ranges 0x70000000 ~ 0x70ffffff.

    This address range is not overlapped with region 20, 22 and 23, according to the sheet below. But we still get error -19.

    Aside from that, we thought that a background region could overlap with other foreground regions.

    Is it an exception when the region is owned by DMSC?

    Regards,

    Liang

  • +1 in reply to liangliang
    TI__Guru 57115 points

    Hi Liang 

    Can you send the configuration which pass and which fails in this form 

    req.fwl_id = 4760
    req.region = 1
    req.control = 0x30a
    req.start_address = 0x70000000
    req.end_address = 0x7fffffff
    req.n_permission_regs = 0x1
    req.permissions[0] = 0xc3ffff
    req.permissions[1] = 0x0
    req.permissions[2] = 0x0

    or can you send me the code which i can test at my end.

    Regards
    Diwakar

  • 0 in reply to Diwakar Dhyani
    Prodigy 40 points

    Hi, Diwakar,

    Please check our following operations on the firewall

    1. We first use TISCI_MSG_GET_FWL_REGION to read region0~region23 of firewall before we configure it, just in case the previous state of firewall

    affect the configuration. The results are listed below,

    Region 0
fwl_id = 4760
region = 0
control = 0x10a
permissions[0] = 0xc3ffff
permissions[1] = 0xc3ffff
permissions[2] = 0xc3ffff
start_address = 0x70000000
end_address = 0x700ef000

Region 1 ~ 19 are disabled, because the value of CONTROL registers of these regions are 0x0

Region 20
Failed to read region 20. I think it's because it's owned by DMSC

Region 21
fwl_id = 4760
region = 21
control = 0x20a
permissions[0] = 0xc3ffff
permissions[1] = 0xc3ffff
permissions[2] = 0xc3ffff
start_address = 0x6d000000
end_address = 0x6dfff000

Region 22
Failed to read region 22.I think it's because it's owned by DMSC

Region 23
Failed to read region 23. I think it's because it's owned by DMSC

    2. Then we try configuring region 0 firewall 4760 with following parameters,

    2.1. Below configuration fails,

    req.fwl_id = 4760
req.region = 0
req.control = 0x10a
req.start_address = 0x70000000
req.end_address = 0x7fffffff
req.n_permission_regs = 0x1
req.permissions[0] = 0xc3ffff
req.permissions[1] = 0x0
req.permissions[2] = 0x0

    2.2. Below configuration fails. (Sorry for providing the wrong result in my previous message. The configuration could onyl succeed on TDA4, instead of DRA821.)

    req.fwl_id = 4760
req.region = 0
req.control = 0x10a
req.start_address = 0x70000000
req.end_address = 0x701fffff
req.n_permission_regs = 0x1
req.permissions[0] = 0xc3ffff
req.permissions[1] = 0x0
req.permissions[2] = 0x0

    2.3. Below configuration succeeds,

    req.fwl_id = 4760
req.region = 0
req.control = 0x10a
req.start_address = 0x70000000
req.end_address = 0x700effff
req.n_permission_regs = 0x1
req.permissions[0] = 0xc3ffff
req.permissions[1] = 0x0
req.permissions[2] = 0x0

    Please let me know if more information is required.

    Regards,

    Liang

  • 0 in reply to liangliang
    TI__Guru 57115 points

    Hi Liang 

    Are You using MSMC as LC cache or SRAM ?

    Regards
    Diwakar

  • 0 in reply to Diwakar Dhyani
    Prodigy 40 points

    Hi, Diwakar,

    I think we're currently using MSMC as SRAM.

    May i ask why does that matter?

    Regards,

    Liang

  • 0 in reply to liangliang
    TI__Guru 57115 points

    Hi Liang

    As per the TISCI documentation the upper 64K is reserved for the  for MSMC communication.

    software-dl.ti.com/.../core.html

    If you configure the firewall avoiding this above 64K memory it should work 

    Regards
    Diwakar