BYTES-3P-BE-AM6254: OLDI LVDS and CSI signal integrity tuning and electrical specifications

Hello Kalpesh Diyora

Thank you for the query.

Kalpesh Diyora said:

We have used LVDS interface in our design.

Can we tune this signal with controlling LVDS interface control register? 

We found below relevant control register but no further detail found in TRM docs, Please suggest possible control option to finetune this clock levels.
2.1.1.284 CTRL_MMR0_OLDI0_CLK_IO_CTRL_PROXY Register (Offset = A610h) [reset = c1043008h ]

Can you please share additional details on the use case including any issues you are facing.

Kalpesh Diyora said:

Share CSI acceptable limit specification for acceptable eye width and height and allowable jitter value.

I assume the above query is for the OLDI and this is for the CSI.

I need more details on your requirements. We recommend discussing a specific topic per thread to be able to assign to the experts as required. 

Could you please start a new thread specific to the CSI related queries.

Regards,

Sreenivasa

Hello Kalpesh Diyora

Please refer below input i received from the display expert

600h 32 MAIN_CTRL_MMR_OLDI0_DAT0_IO_CTRL 0010 8600h
8604h 32 MAIN_CTRL_MMR_OLDI0_DAT1_IO_CTRL 0010 8604h
8608h 32 MAIN_CTRL_MMR_OLDI0_DAT2_IO_CTRL 0010 8608h
860Ch 32 MAIN_CTRL_MMR_OLDI0_DAT3_IO_CTRL 0010 860Ch
8610h 32 MAIN_CTRL_MMR_OLDI0_CLK_IO_CTRL 0010 8610h
Do we allow customer to tweek these registers for OLDI

 Nope, we need their default values only.

 We only change oldi-pd-control

 What does the PD control do - does it power down when not used?

 By default it's powered down. We turn OLDI IOs on with that.

Regards,

Sreenivasa