AM3351: what is the register to modify if reference crystal clock and size of DDR3L is different

mounika meneni

Part Number: AM3351
Other Parts Discussed in Thread: TMDSEMU110-U

hi,

From beagle bone black board i have observed that crystal clock is 24MHZ and DDR3L used is mt41k256m16ha and it is booting from mmc1

In my custom board we are using crystal clock is 25MHZand DDR3L used is mt41k512m16ha and it is booting from mmc0.

so , what are the register to be changed in gel file and board.c file for crystal clock and size difference ?

DO i want to change timing register for it ?

Can you provide Register values to be assigned for changing size of DDR3L and Crystal Clock ?

Thanks,

Mounika

over 2 years ago

0 JJD over 2 years ago

TI__Guru* 85820 points

Information on board port can be found here: https://software-dl.ti.com/processor-sdk-linux/esd/docs/latest/linux/How_to_Guides_Board_Port.html

In the GELs, there is a function GetInputClockFrequency() which will read the input clock from the Boot pins. Ensure that is executing correctly and choosing a 24MHz clock. For DDR changes, please refer to the AM335x EMIF tool app note: https://www.ti.com/lit/pdf/sprack4

Regards,

James

0 mounika meneni over 2 years ago in reply to JJD

Intellectual 460 points

hi,

This issue is resolved.

Which gel file do you recommend to use if my custom board is with am3351 sitara processor and DDr3l (mt41k512m16ha)

But, i am getting DAP error -1170

Thanks,

mounika

0 JJD over 2 years ago in reply to mounika meneni

TI__Guru* 85820 points

I still think there is a communication error with your JTAG pod. Which JTAG hardware are you using? Can you send the JTAG portion of the schematic, which connections to the processor.

James

0 mounika meneni over 2 years ago in reply to JJD

Intellectual 460 points

hi,

i am using JTAG 14-pin Header.i am using TMDSEMU110-U jtag.

i am sending JTAG Schematics:

0 JJD over 2 years ago in reply to mounika meneni

TI__Guru* 85820 points

Did you get this schematic reviewed by TI? I can't tell much from the two pages you sent, although i do see that VPP is powered by 1.8V (this should be NC during normal operation), see note 5 in table 5.1 of the datasheet. I don't think this is causing your issue though.

You will need to monitor resets and power around the time the error occurs in CCS. Ensure there is no glitches on reset or power droops. Check TRST on the JTAG connector as well. Can you try to perform other actions in CCS without initializing the DDR (you can change the name of the function that initialized DDR to disable it), to see if you get that error again.

Regard,s

James

0 mounika meneni over 2 years ago in reply to JJD

Intellectual 460 points

what is function to disable DDR in gel file ?

How can i load code into internal RAM?

Is it possible to Debug my code from internal RAM present in am3351 Sitara processor ?

Regards,

Mounika.

0 JJD over 1 year ago in reply to mounika meneni

TI__Guru* 85820 points

1. you can rename the function DDR_Init() to something else to disable the initialization of the DDR

2. You can load code in RAM by using Run->Load->Load Program or Tools->Fill Memory

3. Yes, you can use the debugger to debug code in internal RAM

Regards,

James

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AM3351: what is the register to modify if reference crystal clock and size of DDR3L is different