Debug help with C6474 EDMA3 example

Manu,

If you would, please edit your original post above to include a link to the post that had the example for EDMA and IPC on which you based your code. Or add it in your response, but in the original would be helpful to future readers. And I know from your other helpful posts that people will be following your work on E2E.

Since I recognize some of my handwriting in your code, I would like to know if the original project worked for you. I think it was posted somewhere for CCSv4, but the original may have been for CCS 3.3. Running that example on just Core0 will do a transfer from Core0's L2 to Core1's L2 and, if it works, would prove out your hardware and that there is a baseline to fall back on.

Although I have not yet run your example, I did read through it and have some comments. Some of these may be making corrections to my original code, too, and some may be wrong since I have not tested your example with my comments. Caveats complete.

1. The most common error in using EDMA3 to transfer data to/from L2 is using the Local L2 address 0x00800000 rather than the Global L2 address 0x1n800000 where n=corenum. In my example, I add an offset in the PARAM setup step. This offset is not obvious to me in your code. What is the hex address that is written into the SRC and DST fields of the PARAM?

2. Different DSPs implement EDMA3 in slightly different ways, so the initialization is slightly different in each case. Some of our CSL examples have errors in the initialization steps, and I was glad to see that you had the dmahwSetup and qdmahwSetup arrays initialized correctly at their declarations. But you commented out the lines that assign these two arrays into the hwSetup struct that is passed to CSL_edma3HwSetup.

3. I have never been a fan of the argument order for the EDMA3 PARAM MAKE macros. The ones for ACNT/BCNT and the Indexes are in the order you tend to speak them but they are in the opposite order of the way they appear in a 32-bit wide hex memory display. And because of that, I get confused and have to go look at the source to be sure how they should be used. Because of this, I am pretty sure that I wrote the following two lines incorrectly in my example, and I am not sure why I did not notice the transfers being executed incorrectly.

Original example - incorrect said:

        myParamSetup.aCntbCnt = CSL_EDMA3_CNT_MAKE(BUF_SIZE_W,4);            // Acnt Bcnt
        ...
        myParamSetup.srcDstBidx = CSL_EDMA3_BIDX_MAKE(0,0);                  // B src and dst index

It was my intention to use ACNT=4, BCNT=BUF_SIZE_W, with ABSync. This would also mean that the BIDX args should be (4,4) to step through memory sequentially. But I have the order wrong order of the two arguments. This should be changed, in two places, to the corrected code below.

Repaired example - corrected said:

        myParamSetup.aCntbCnt = CSL_EDMA3_CNT_MAKE(4,BUF_SIZE_W);            // Acnt Bcnt
        ...
        myParamSetup.srcDstBidx = CSL_EDMA3_BIDX_MAKE(4,4);                  // B src and dst index

You do not have this problem in your code, because you set BCNT=1, so no BIDX value is needed.

4. When you manually trigger a DMA channel, you do not need to set the EER bit using CSL_edma3ChannelEnable().

If none of this gets you to a solution, paste in the printf's. I hope that 1) and 2) will get you moving forward.

Regards,
RandyP

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Hi Manu,

I would like to correct my previous comments that I thought you were using the "rmRdBuf" and "rmWrBuf" which are defined as global address. But you are actually using “loRdBuf” and “loWrBuf” which seem to be the local L2 address. 

So please follow Randy's suggestions, which could be very helpful to your debugging. Sorry for the confusion.

Sincerely,

Steven