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TDA4VH-Q1: Linux System Clock Related to GTC

Part Number: TDA4VH-Q1
Other Parts Discussed in Thread: TDA4VH

Hi TI Clock Experts,

Customer is trying to design some synchronization tasks between different cores based on TDA4VH SDK8.6.

As we know, apart from GTC, we also have Linux system clock like CLOCK_MONOTONIC.

The question is that do we have any other Linux system clock which is also related to GTC?

Thanks a lot,

Kevin

  • Hi Kevin,

    Is it a request for time sync between various cores on TDA4VH?

    - Keerthy

  • Hi Keerthy,

    Yes, customer is doing some design on time sync between various cores.

    They hope to know if we have any linux system clock that may have some relationship with GTC.

    We think CLOCK_MONOTONIC might be one of them, but not sure if there are any other clocks like this.

    Thanks a lot,

    Kevin

  • Kevin,

    I checked internally as well. The GTC is definitely feeding into Arch timer of A72. Hence we hook that on to A72 DTS.

    U-Boot dts file: arch/arm/dts/k3-j7200-r5-common-proc-board.dts

    So the 61 clk is the GTC.

    "If you want to compute the elapsed time between two events observed on the one machine without an intervening reboot, CLOCK_MONOTONIC is the best option."

    https://stackoverflow.com/questions/3523442/difference-between-clock-realtime-and-clock-monotonic

    So GTC looks to be the common clock that can be used across cores.

    - Keerthy

  • Hi Keerthy,

    "The GTC is definitely feeding into Arch timer of A72"

    Does it mean the GTC relate to some linux api like "clock_gettime"? Or it's just used in remoteproc?

    BR

    Gorjay

  • Hi Keerthy,

    Thanks for the clear explanation!

    It seems that GTC is initialized in the UBOOT stage before kernel booting. When we look at the Linux SDK, the GTC timer is loaded in the following 2 files.

    1: arch/arm/mach-k3/j784s4/clk-data.c

     2: arch/arm/dts/k3-j784s4-r5-evm.dts

    There is one more thing I am not sure is that, does the above UBOOT dts file also can make the GTC as the timer in kernel stage? Because we can not find information in the kernel boot stage that configure or load the GTC timer.

    The usecase of customer is that they are designing the timing synchronization between A72(4ms) and R5F(125us), do we have recommended solution for this clock alignment? 

    Thanks a lot!

    Kevin

  • Hi Keerthy,

    After some internal discussions ,let me provide the summary below.

    For problem 1:

    The first set of GTC frequency is in R5 SPL. It will be configured in K3-j721s2-r5-common-proc-board.dts. Then this value will be written to CNTFID0 register in the function k3_arm64_start() in Ti_k3_Arm64_rproc.c. And this register value will be used to configure CNTFRQ_EL0, the ARMv8 Timer, which is used as the timer when we execute "date" command in Linux.

    For some background GTC is the TI made up name for the (mandatory in ARMv8) memory mapped part ARMv8 generic timer. The ARMv8 architecture spec https://developer.arm.com/documentation/ddi0487/latest requires this memory mapped on the SoC (D11.1.1 The full set of Generic Timer components ), but the underlying interface ARM A cores use to access this is their local view. The gray code from GTC drives the Generic timer. So though it has a memory mapped interface, we actually get the same count at generic timer level.

    However, on R5f we do not have this kind of local generic timer, but we use DM timer instead.

    For problem 2:

    We could try DM timer for system tick & use CPTS to synchronize the timers.

    Thanks a lot!

    Kevin