Hi team,
If interrupts are masked with the Interrupt enabled clear register after an interrupt has entered the VIM of R5F, will the interrupts entered before being masked be masked?
Thanks and best regards,
Kenley
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Hi team,
If interrupts are masked with the Interrupt enabled clear register after an interrupt has entered the VIM of R5F, will the interrupts entered before being masked be masked?
Thanks and best regards,
Kenley
Hi Kenley,
Sorry, I am not sure if I understand the query correctly. Can you please elaborate on this. Also, please mention what is the use case here?
Regards,
Parth