TDA4VH-Q1: power consumption and high speed interface guidelines

Good day, colleagues,

Do we have some electrical specifications of TDA4VH-Q1? More specifically speaking we’re looking for power consumption of TDA4VH when different functionalities are active. Sort of a compartmentalized guide sheet of TDA4VH-Q1 blocks’ power consumption.

Do we have a DDR and other high speed interface(PCIe, Ethernet, etc) guideline for routing and specific requirements to keep in mind specifically for this CPU(proximity, power over different traces, etc)?

Thank you,

Daria