Part Number: AM6548
Dear TI,
Currently we are facing a problem of doing 4G DDR mem test on our customisation board, we are using the mem_test.c from PDK as the base to do the mem test under R5, however, there is only 2G address space for DDR under R5F, so it's not possible for us to perform the 4G DDR test under R5...
We noticed the DDR size for EVM is 4G, so we are wondering how TI performed the 4G DDR test on EVM board?
From the public document we can only find the mem test log in [1] which only test 2G space.
From the PDK code, we noticed the mem test should be buildable for A53 as well, however, we didn't find any document of how to perform mem test on A53 core... Also in the code [2] the DDR space is staring from 0x9_0000_0000, don't know why, since the TRM says DDR is starting from 0x8_0000_0000 (or 0x8_8000_0000), so we are wondering is this code actually workable on A53?
BRs/Baocheng Su