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PROCESSOR-SDK-AM64X: Please check the stability of pulse generated by CPTS in CPSW

Part Number: PROCESSOR-SDK-AM64X
Other Parts Discussed in Thread: SK-AM64B

CCS:12.3.0

SDK: mcu_plus_sdk_am64x_08_06_00_45\examples\networking\enet_layer2_multi_channel

EVM:SK-AM64B 

I want to generate PPS synchronized to the network Clock(PTP/IEEE 1588), and then Data acquisition sync to PPS. I have got PPS from two SK board, but the two PPS  are asynchronized.

As shown above, the yellow one is PPS from SK board, the middle green PPS is from Clock Switch, they are synchronized at the beginning, but the green one moved to left slowly, they asynchronized.

I generated PPS by CPSW/CPTS GENF0 with GENF0 PPM disabled.

As shown below, when TIME_STAMP[63-0] = CPTS_GENFn_COMP[63-0] PPS is generated, thereafter the CPTS_GENFn_LENGTH[31-0] is independ of TIME_STAMP[63-0].

CPTS_GENFn_LENGTH counted the CPTS_REF_CLK, that is to say, the period which depended on CPTS_REF_CLK is stationary.

Am I correct about the figure in TRM?

But it seems the counter of CPTS_REF_CLK is unstable, it seems to be adjusted by the TIME-STAMP[63-0],because CPTS_GENFn_LENGTH[31-0] is static after init.

Please check my use of CPTS GENF.

Waiting for your reply.

Thans you very much.

  • Hi Ronny.Cheng,

    Thanks for your query.

    I will check on this and get back to you.

    Best Regards

    Ashwani

  • Hi Ronny,

    As per MCUSDK 8.6 documentation, this is provided as an extension of ENET CPSW Layer 2 Multichannel example (but only as a demo).

    So, it was not tested thoroughly. 

    https://software-dl.ti.com/mcu-plus-sdk/esd/AM64X/08_06_00_45/exports/docs/api_guide_am64x/EXAMPLES_ENET_LAYER2_MULTI_CHANNEL_PTP.html

    We are working on creating a working tested example in SDK.

    We are seeing some improvement with latest release (below). Can you try on your side and update the results ?

    https://software-dl.ti.com/mcu-plus-sdk/esd/AM64X/09_00_00_35/exports/docs/api_guide_am64x/EXAMPLES_ENET_LAYER2_MULTI_CHANNEL_PTP.html

    Best Regards

    Ashwani

  • hi, Ashwani, I have tested your suggestion, but it doesn't seem to be improved .  I tried with mcu_plus_sdk_am64x_09_00_00_35 and CCS 12.4,on TMDS64 EVM board.

    I have found these questions, please check.

    (1) SDK incoherent with TRM about CPTS

    IN SDK:    #define CSL_CPTS_TS_GENF_CONTROL_REG_PPM_DIR_MASK                              (0x00000001U)
                     #define CSL_CPTS_TS_GENF_CONTROL_REG_POLARITY_INV_MASK                    (0x00000002U)
    IN TRM Table 12-805.:    PPM_DIR  is bit1 not bit0
    when I configure like this:
    gens.length = CPTS_Get_Frequency();
    gens.polarityInv = 1;
    I read CPSW_GENF0_CONTROL_REG,the value is 0x02,  The pusle of GENF did not change level asserted, but the ppm dir was in effect   --It seems that TRM in  Table 12-805 is correct, SDK is fault.
    (2) PPM DIR lapsed when I reconfigure PPM_DIR
    My log shown below.
    At the beginning, PPM was disabled. I changed the PPM_DIR at seconds is 1693174091, The CPTS GEN PPM did take effect, but it failed at seconds is 1693174092, my code did not change PPM_DIR at that time, I had no idea why suddenly PPM was not working.    There was inherent bias on board, we should run it without PPM, calculate the offset, then active PPM. While it seem thar PPM function is not stable.
    [First-TimeStamp]seconds is 1693174036, nanoseconds is 0
    [Last-TimeStamp]seconds is 1693174074, nanoseconds is 999968169
    [Current-TimeStamp]seconds is 1693174075, nanoseconds is 999966970
    [expect]seconds is 1693174076, nanoseconds is 0
    now_diff is -1199, aim_diff is -33030,diff_total is 0

    CPSW_CPTS_CONTROL_REG: 2FFA9
    CPSW_GENF0_PPM_REG: 0-0
    CPSW_GENF0_CONTROL_REG: 2

    g_PPM_flag is 1, g_total_count is 40, g_useful_count is 0, g_delta_ppm is -1183, g_ppm_value is 845308

    ......

    [Last-TimeStamp]seconds is 1693174090, nanoseconds is 999965325
    [Current-TimeStamp]seconds is 1693174091, nanoseconds is 999965170
    [expect]seconds is 1693174092, nanoseconds is 0
    now_diff is -155, aim_diff is -34830,diff_total is 0

    CPSW_CPTS_CONTROL_REG: 2FFA9
    CPSW_GENF0_PPM_REG: 0-6F60C7
    CPSW_GENF0_CONTROL_REG: 0

    g_PPM_flag is 1, g_total_count is 56, g_useful_count is 0, g_delta_ppm is -137, g_ppm_value is 7299270


    [First-TimeStamp]seconds is 1693174036, nanoseconds is 0
    [Last-TimeStamp]seconds is 1693174091, nanoseconds is 999965170
    [Current-TimeStamp]seconds is 1693174092, nanoseconds is 999963965
    [expect]seconds is 1693174093, nanoseconds is 0
    now_diff is -1205, aim_diff is -36035,diff_total is -1205

    CPSW_CPTS_CONTROL_REG: 2FFA9
    CPSW_GENF0_PPM_REG: 0-6F60C7
    CPSW_GENF0_CONTROL_REG: 0

    g_PPM_flag is 1, g_total_count is 57, g_useful_count is 1, g_delta_ppm is -137, g_ppm_value is 7299270

    ......
    (3) Do as the TRM suggested, it did not take effect,please tell me the correct method
    In TRM:"The length should be zero while the comparison value and other configuration parameters are being configured. The length should be written non-zero to enable operations last."  
    PPM_DIR was changed at seconds is 1693173497, you can see [Current-TimeStamp] is 3 seconds behind [Last-TimeStamp],for I changed  CPSW_GENF_COMP_LOW_REG/CPSW_GENF_COMP_High_REG at the same time, but PPM did not take effect.
    I changed the PPM_DIR without changing CPSW_GENF0_LENGTH_REG in step(2)above, it took effect.
    [First-TimeStamp]seconds is 1693173455, nanoseconds is 0
    [Last-TimeStamp]seconds is 1693173492, nanoseconds is 999969989
    [Current-TimeStamp]seconds is 1693173493, nanoseconds is 999968764
    [expect]seconds is 1693173494, nanoseconds is 0
    now_diff is -1225, aim_diff is -31236,diff_total is -8473

    CPSW_CPTS_CONTROL_REG: 2FFA9
    CPSW_GENF0_PPM_REG: 0-0
    CPSW_GENF0_CONTROL_REG: 2
    g_PPM_flag is 0, g_total_count is 39, g_useful_count is 7, g_delta_ppm is -2001, g_ppm_value is 499750


    [First-TimeStamp]seconds is 1693173455, nanoseconds is 0
    [Last-TimeStamp]seconds is 1693173494, nanoseconds is 999967519
    [Current-TimeStamp]seconds is 1693173497, nanoseconds is 999967546
    [expect]seconds is 1693173496, nanoseconds is 0
    now_diff is 2000000027, aim_diff is 1999967546,diff_total is 2000000027
    CPSW_CPTS_CONTROL_REG: 2FFA9
    CPSW_GENF0_PPM_REG: 0-C91AB
    CPSW_GENF0_CONTROL_REG: 0
    g_PPM_flag is 1, g_total_count is 41, g_useful_count is 1, g_delta_ppm is -1214, g_ppm_value is 823723

    [First-TimeStamp]seconds is 1693173455, nanoseconds is 0
    [Last-TimeStamp]seconds is 1693173497, nanoseconds is 999967546
    [Current-TimeStamp]seconds is 1693173498, nanoseconds is 999966241
    [expect]seconds is 1693173497, nanoseconds is 0
    now_diff is -1305, aim_diff is 1999966241,diff_total is 1999998722
    CPSW_CPTS_CONTROL_REG: 2FFA9
    CPSW_GENF0_PPM_REG: 0-C91AB
    CPSW_GENF0_CONTROL_REG: 0
    g_PPM_flag is 1, g_total_count is 42, g_useful_count is 2, g_delta_ppm is -1214, g_ppm_value is 823723

    Avg=135
    -289ns<---->179ns
    [First-TimeStamp]seconds is 1693173455, nanoseconds is 0
    [Last-TimeStamp]seconds is 1693173498, nanoseconds is 999966241
    [Current-TimeStamp]seconds is 1693173499, nanoseconds is 999964920
    [expect]seconds is 1693173498, nanoseconds is 0
    now_diff is -1321, aim_diff is 1999964920,diff_total is 1999997401
    CPSW_CPTS_CONTROL_REG: 2FFA9
    CPSW_GENF0_PPM_REG: 0-C91AB
    CPSW_GENF0_CONTROL_REG: 0
    g_PPM_flag is 1, g_total_count is 43, g_useful_count is 3, g_delta_ppm is -1214, g_ppm_value is 823723
    It seems that there are still some problems about CPSW/CPTS/GENF, please check. 
    Wait for your reply.
    Thank you very much.
    BR
    Ronny 
  • Hi Ronny,

    Thanks for info.

    I will check and get back to you.

    As I am on leave, you can expect some response by next week.

    Best Regards

    Ashwani

  • hi, Ashwanl, are there any going on?

  • Hi Ronny,

    Please note that the PTP stack in multi-channel example is just for demo purpose and is not a full fledged stack. We have added a proper gPTP(802.1AS - 2020) stack in 9.0 SDK for AM243x and AM64x.

    https://software-dl.ti.com/processor-industrial-sw/esd/ind_comms_sdk/am64x/09_00_00_03/docs/api_guide_am64x/index.html

    https://www.ti.com/tool/download/MCU-PLUS-SDK-AM64X/09.00.00.35

    https://dev.ti.com/tirex/explore/node?node=A__AD2nw6Uu4txAz2eqZdShBg__INDUSTRIAL-COMMUNICATIONS-SDK-AM64X__wljCT77__LATEST

    Best Regards

    Ashwani