PROCESSOR-SDK-J721S2: Cacheable Memory

Waleed Hussen

Hi all,

How to config region of memory as cacheable memory ?

I'm now facing an issue in accessing memory with runtime.

Here is the device tree.

A72-memory@90000000 {
compatible = "shared-dma-pool";
reg = <0x0 0x90000000 0x0 0x03FFFFFF>;
no-map;
phandle = <0xf6>;
};

How can I achieve low latency access and copy from this memory?

0 Keerthy J over 2 years ago

Hi,

What is the end use case?

What are you using this shared dma pool memory for?

- Keerthy

0 Waleed Hussen over 2 years ago in reply to Keerthy J

Doing operation on this memory direct like for example case it to structure and read from this structure direct.

0 Keerthy J over 2 years ago in reply to Waleed Hussen

Hi,

I checked internally and the feedback is that there is no additional flags that need to be passed to make the region cached.

Are you doing mmap and then using this?

Best Regards,

Keerthy

Processors forum