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AM4378: About the value of the setting to CPSW_SL_MACCTRL

user1201164
Expert 1770 points
Part Number: AM4378

Hi,.

We have a question from one of our customers.

They are using AM437x and are running Linux with SDK 7.3.1
They are using two channels of Ethernet, but when they look at the process to set the spped settings for LAN, they see that in _cpsw_adjust_link() in the CPSW driver (drivers/net/ethernet/ti/cpsw.c), only the CPSW_SL_MACCTRL register, only IFCTL_A appears to be set.

static void _cpsw_adjust_link(struct cpsw_slave *slave,
                                                struct cpsw_priv *priv, bool *link)
{
              struct phy_device            *phy = slave->phy;
              u32                                    mac_control = 0;
　：
                            /* set speed_in input in case RMII mode is used in 100Mbps */
                            if (phy->speed == 100)　　★
                                          mac_control |= CPSW_SL_CTL_IFCTL_A;　★
　：

If they refer to the Technical Reference Manual, the IFCTL_B, IFCLT_A registers are defined and the IFCTL_B setting process appears to be missing.
Operationally, both CHs operate at 100 Mbps, but they believe that the IFCTL_B setting may need to be added to the driver.

Best Regards,

Kouji Nishigata

  • 0
    TI__Mastermind 40090 points

    Hi,

    The IP designer indicated that IFCTL_B bit is not used, only the IFCTL_A bit is used. If I understand your question correctly there is what is called a ethernet sliver which is a set of registers for each external port of the CPSW. Each port has its own CPSW_SL_MACCTRL register. Therefore each port uses its own IFCTL_A bit in the MAC_CTRL register for the ethernet sliver. Each port does not use the IFCTL_B bit. 

    Best  Regards,

    Schuyler

  • 0 in reply to Schuyler Patton
    Expert 1770 points

    Hi, Schuyler

    Thanks for your answer.

    I have reviewed the TRM and found that in P150, "Table 2-4. L4 Fast Peripheral Memory Map",

    Is this the setting for Port1 and Port2 respectively?
    I have not checked, but I wonder if CPSW_SL2 is also set in the same way in the driver.
    I understand that the IFCTL_B bit is not used in the Port2 setting.

    Best Regards,

    Kouji Nishigata

  • +1 in reply to user1201164
    TI__Mastermind 40090 points

    Hi,

    You are correct, each port has it's own sliver and own MAC control register. The driver uses an direct addressing technique for the ports, there is not unique code for each port. 

    Best Regards,

    Schuyler