AM68A: Boot from UART issue

CHEN WENFENG

Part Number: AM68A

Hi，

I try to boot SK-AM68-EVM from UART，and using ti-processor-sdk-linux-j721s2-evm-09_00_00_06-Linux-x86-Install.bin. After building u-boot, I try to use tiboot3.bin in R5 document and tispl.bin /u-boot.img in A72 document.

Step1: #sx -kb --xmodem tiboot3-j721s-hs-fs-evm.bin < /dev/ttyUSB0 > /dev/ttyUSB0

And transfer complete

Step2:#sx -kb --ymodem tispl.bin < /dev/ttyUSB0 > /dev/ttyUSB0

It shows “Transfer incomplete"

I don't know why tispl.bin can not transfer OK. Could you please help me solve this problem.

Thanks!

over 1 year ago

0 Karan Saxena over 1 year ago

TI__Guru* 77754 points

Are you seeing the same issues with the prebuilt SDK binaries as well?

Regards

Karan

0 CHEN WENFENG over 1 year ago in reply to Karan Saxena

Prodigy 200 points

Yes, I have tried to use prebuilt SDK. The same as build SDK.

0 Karan Saxena over 1 year ago in reply to CHEN WENFENG

TI__Guru* 77754 points

Thanks, I will give this a try on my setup.

0 Thomas Yang55737 over 1 year ago in reply to Karan Saxena

TI__Expert 4986 points

Karan,

We aiso reproduced this issue in our EVM setup, any suggestion from your side?

Thomas

0 Karan Saxena over 1 year ago in reply to Thomas Yang55737

TI__Guru* 77754 points

Thomas

Can you please follow the below steps, with these I've been able to get the UART boot working on the AM68A-Starter Kit (https://www.ti.com/tool/SK-AM68)

Also, please confirm that you are using this board.

1. Change boot mode to UART boot mode. Refer Table2-3 of the SK user guide - https://www.ti.com/lit/ug/spruj68/spruj68.pdf

2. Power up the board and close all UART terminals (Terterm, Putty, minicom sessions) and run the below commands in that order.

sx -kb --xmodem tiboot3-j721s2-hs-fs-evm.bin < /dev/ttyUSB1 > /dev/ttyUSB1
sx -kb --ymodem tispl.bin < /dev/ttyUSB2 > /dev/ttyUSB2
sx -kb --ymodem u-boot.img < /dev/ttyUSB2 > /dev/ttyUSB2

Regards

Karan

0 CHEN WENFENG over 1 year ago in reply to Karan Saxena

Prodigy 200 points

Hi karan

After running commands，some log is in terminals.

EVM using micron MT53E2G32D4DE-046 AUT:C(Dual Rank, 32Gb), but my board uses samsung K4F8E3S4HD( single rank ,8Gb).

I have change DDR config as following.

I don't know why my board can not boot.

0 Karan Saxena over 1 year ago in reply to CHEN WENFENG

TI__Guru* 77754 points

Let me check this internally, I will get back to you on this.

Regards

Karan

0 CHEN WENFENG over 1 year ago in reply to Karan Saxena

Prodigy 200 points

Hi karan,

After changing LPDDR4 frequency to 800M( data 1600M), UART Boot is ok. Logs are as following,

And I wonder if LPDDR4 timing should be changed in DDR_regconfigtools for 3200M speed.

0 Karan Saxena over 1 year ago in reply to CHEN WENFENG

TI__Guru* 77754 points

I've passed this on to a DDR expert.

Regards

Karan

0 Kevin S over 1 year ago in reply to CHEN WENFENG

TI__Mastermind 38170 points

Hi,

CHEN WENFENG said:
And I wonder if LPDDR4 timing should be changed in DDR_regconfigtools for 3200M speed.

Yes, I would recommend configuring the latency values (section A of the timing worksheet) to match the frequency range.

Also, please note that some refresh timings (ex: tRFC) change with density size.

Regards,
Kevin

0 CHEN WENFENG over 1 year ago in reply to Kevin S

Prodigy 200 points

Hi kevin

I try to change the latency values for 2400M speed，but it do not work. The logs are as following:

I don't know if my configure data is wrong. Could you please help me check my configure data?

0 CHEN WENFENG over 1 year ago in reply to CHEN WENFENG

Prodigy 200 points

Hi Kevin,

I do not know how to set ODTLon and ODTLoff, because there are no detail data in LPDDR4 SPEC. And I set it to zero，it works in 2133M speed

But when change RL , WL and nWR for 3200M speed. The logs are as following:

It looks like that AM68A is running sometimes, but it stops due to some errors.

What can I do to confirm weather it is SI or DDR timing issue.

Thanks!

0 Thomas Yang55737 over 1 year ago in reply to CHEN WENFENG

TI__Expert 4986 points

Hi Chen

Please check below cn doc on ODTLon and ODTLoff and other parameters setting.

https://www.ti.com.cn/cn/lit/an/zhcabb1b/zhcabb1b.pdf

-Thomas

0 CHEN WENFENG over 1 year ago in reply to Thomas Yang55737

Prodigy 200 points

Hi Thomas,

According to document， ODTon and ODToff is set by user, but I do not know how to set .There are no guides in samsung LPDDR4 SPEC.

What's more, if it means that LPDDR4 size should be bigger than 2GB according to document.

Thanks!

0 Kevin S over 1 year ago in reply to CHEN WENFENG

TI__Mastermind 38170 points

Hi Chen,

CHEN WENFENG said:
ODTon and ODToff is set by user, but I do not know how to set .There are no guides in samsung LPDDR4 SPEC.

This information may just be missing from the memory suppliers datasheet. If you haven't already, can you try contacting the memory supplier to see if they can provide this information?

The LPDDR4 ODT should be turned ON / OFF automatically by the LPDDR4 memory control logic (based on the incoming commands).

ODTLon and ODTLoff define the latency portion of the time it takes for the LPDDR4 ODT to turn ON / OFF.

Regards,
Kevin

Processors

Processors forum

AM68A: Boot from UART issue