EDMA3 on C6678EVM

I am very uncertain about what the problem could be, but try clearing all the error bits before you do anything:

#define KICK0     0x02620038

#define KICK1     0x0262003C

#define SECR      0x02701040

#define SECRH     0x02701044

#define EMCR      0x02700308

#define EMCRH     0x0270030C

#define CCERRCLR  0x0270031C  //EDMA3CC Error Clear Register

//typedef unsigned int UInt32;

#define EDMA_CC_BASE   (0x02700000) /* DM648. Check address for other devices. */

#define DCHMAP0     *((volatile unsigned int *)(EDMA_CC_BASE + 0x0100))

#define DMAQNUM0    *((volatile unsigned int *)(EDMA_CC_BASE + 0x0240))

#define QUEPRI      *((volatile unsigned int *)(EDMA_CC_BASE + 0x0284))

//#define EMCR        *((volatile unsigned int *)(EDMA_CC_BASE + 0x0308))

//#define EMCRH       *((volatile unsigned int *)(EDMA_CC_BASE + 0x030C))

#define QEMCR       *((volatile unsigned int *)(EDMA_CC_BASE + 0x0314))

//#define CCERRCLR    *((volatile unsigned int *)(EDMA_CC_BASE + 0x031C))

#define QWMTHRA     *((volatile unsigned int *)(EDMA_CC_BASE + 0x0620))

#define ESR         *((volatile unsigned int *)(EDMA_CC_BASE + 0x1010))

#define IPR         *((volatile unsigned int *)(EDMA_CC_BASE + 0x1068))

#define ICR         *((volatile unsigned int *)(EDMA_CC_BASE + 0x1070))

void clearRegisters()

{

    volatile UInt32 *kick0 = (volatile UInt32 *)KICK0;

    volatile UInt32 *kick1 = (volatile UInt32 *)KICK1;

    volatile UInt32 *secr = (volatile UInt32 *)SECR;

    volatile UInt32 *secrh= (volatile UInt32 *)SECRH;

    volatile UInt32 *emcr = (volatile UInt32 *)EMCR;

    volatile UInt32 *emcrh = (volatile UInt32 *)EMCRH;

    volatile UInt32 *ccerrclr = (volatile UInt32 *) CCERRCLR;

    // unlock the KICK mechanism in the Bootcfg MMRs if defined

    kick0[0] = 0x83e70b13;      // must be written with this value

    kick1[0] = 0x95a4f1e0;      // must be written with this value

    secr[0] = 0xffffffff;

    secrh[0] = 0xffffffff;

    emcr[0] = 0xffffffff;

    emcrh[0] = 0xffffffff;

    ccerrclr[0] = 0xffffffff;

    // more EDMA register initialization

    QUEPRI=0x10;

    QWMTHRA =(16<<8u)|(16 & 0xFF);

}

void main(void) {

 clearRegisters();

... // the rest of your code

Hi,

I tried but it didn't help.

I could suggest using the latest version of MCSDK (2.0.0.11 or 2.0.0.12)

And I'm also confused at how you say that you used the CSL example, but request_channel is a EDMA LLDriver function.

I have only used the CSL API for EDMA, and it has been quite reliable. Does the CSL example (pdk..../packages/ti/csl/example/edma/edma_test.c) work on your non-simulator device?

I am using the latest version (re-downloaded few days ago).

The CSL example works fine on simulation but not when running on the board. 

I used the LLD in a different project because CSL is not working.

At last I solved the problem with the help of this thread: 

EVM6678l stuck on a routine CSL_EDMA3_GetHwStatus ()

I configured the EDMA to work with transfer completion routine. When I make the first transfer the routine works.

But when I try to send again, the data is sent but the interrupt does not work.

I think the interrupt should be cleared in the transfer completion routine but I am not sure how.

Any ideas?

Thank you. 

The following code should handle your problem although I'm not sure *exactly* how your transfers are configured. The flow of an EDMA command is typically setup->issue->poll/wait->clear for each transfer (excluding ping-pong, chained, or linked transfers)

CSL_Edma3CmdIntr regionIntr;

    /* Clear the pending bit */

    regionIntr.region = regionNum;

    regionIntr.intr = (TCC); // Often this is just a single bit

    regionIntr.intrh  = 0; // high-bits if you are using them

    CSL_edma3HwControl(hModule,CSL_EDMA3_CMD_INTRPEND_CLEAR,&regionIntr);

Hi,

Didn't help. The IPR register is cleared but the with no help. moreover, If I hit the restart button and run again the event handler is not called even in the first transfer. Only if I hit 'restart CPU' button it works (only on the first transfer of course). I suspect there is another register I should clear.

BTW, my transfers are manually triggered, I am working in global region and I setup the INTC controller to execute a transfer completion routine.

Have you looked at the example in the PDK?

ti/csl/example/edma/edma_test.c

That goes through all the necessary steps to setup, perform, and clean-up a transfer.  You can probably achieve exactly what you are wanting to do by slightly modifying one of the transfers it is already performing.

Hi Tim,

I wanna trigger IPC interrupt to core1 to bring core1 out of IDLE state in the booting process. The device is 6670. Is it true that I need to unlock the KICKx registers before I

write IPCGx registers? But I can't write the KICKx registers. The KICK0 address is 0x02620038 and the address of KICK1 is 0x0262003c. 

*(int*)(0x02620038) = value Can the above statement be used to write the KICK register?

Thanks

Nick