TMS320C6657: I2C issue

Cherry Zhou

Part Number: TMS320C6657

Hi Team,

Issue: I2C deadlock issue with TMS320C6657CZHA

1) After a soft restart of the chip, there is a certain probability that the following problems occur: When I2C first reads and writes, SDA normally pulls low, but SCL does not jump low but remains high continuously. The waveform is as follows:

Figure1. non-working waveform

Figure 2. working waveform

2) Hardware: The DSP is the master and there are four slaves on the bus, TPL0401A-10DCKR, ICM-20948, DS3232MZ+ and AT24CM01 and uses PCA9306DCUR on the bus for level translation.

3) Embedded program: After the chip is restarted, the I2C controller is reset through the registers. The first operation of the bus is to write data to the TPL0401A-10DCKR.

4) Problem reproduction: The I2C bus works properly after manually pulling SCL low and then releasing it.

Could you please help check this case? Thanks.

Best Regards,

Cherry

over 2 years ago

0 Shankari G over 2 years ago

TI__Mastermind 25535 points

Cherry,

Cherry Zhou said:
3) Embedded program: After the chip is restarted, the I2C controller is reset through the registers. The first operation of the bus is to write data to the TPL0401A-10DCKR.

Please check your I2C register configuration with the I2C initialization code below.

This code is part of the package " PROCESSOR-SDK-RTOS-C665x 06_03_00_106 " located at pdk_c665x_2_0_16\packages\ti\platform\evmc6657l\platform_lib\src\evm665x_i2c.c

/******************************************************************************
*
* Function: evmI2cInit
*
* Description: This function initializes I2C controller.
*
* Parameters: void
*
* Return Value: void
******************************************************************************/
void evmI2CInit(void)
{
// Set I2C in reset
I2CR->ICMDR &= (~CSL_I2C_ICMDR_IRS_MASK);

platform_delaycycles(100);

// Set Own Address
I2CR->ICOAR = I2C_OWN_ADDR;

// Set Default I2C High and Low Clock Hold
I2CR->ICPSC = I2C_PRESCALER;
I2CR->ICCLKL = I2C_CLK_LOW;
I2CR->ICCLKH = I2C_CLK_HIGH;

// Enable the Xmt, Master Mode
I2CR->ICMDR = ( CSL_I2C_ICMDR_MST_MASK |
CSL_I2C_ICMDR_TRX_MASK |
CSL_I2C_ICMDR_FREE_MASK );

// Take I2C Out of Reset
I2CR->ICMDR |= CSL_I2C_ICMDR_IRS_MASK;

platform_delaycycles(100);

}

================

/******************************************************************************
*
* File Name: evmc66x_i2c.h
*
* Description: This contains i2c specific structure, typedefs, function
* prototypes.
*
*
******************************************************************************/
#ifndef _EVM66X_I2C_H_
#define _EVM66X_I2C_H_

/************************
* Include Files
************************/
#include "cslr_i2c.h"
#include "cslr_device.h"

/************************
* Defines and Macros
************************/
#define EEPROM_I2C_SLAVE_ADDR (0x50)
#define I2C_OWN_ADDR (0x10)

// Interrupt
#define I2C_DISABLE_INTR (0x00)

#ifdef _I2C_400KHZ_
// I2C prescalar set to 16 to get module freq (1000MHz/6)/147 = 11.9 MHz
#define I2C_PRESCALER (13)
// Setting the divider to divide module freq 11.9MHz/((9+6)+(9+6)) = 396.67 KHz
#define I2C_CLK_LOW (9)
#define I2C_CLK_HIGH (9)
#else
// I2C prescalar set to 16 to get module freq (1000MHz/6)/17 = 9.8 MHz
#define I2C_PRESCALER (16)
// Setting the divider to divide module freq 9.8MHz/((36+6)+(36+6)) = 116.67 KHz
#define I2C_CLK_LOW (36)
#define I2C_CLK_HIGH (36)
#endif

/************************
* Globals
************************/
#define I2CR ((CSL_I2cRegs*) CSL_I2C_DATA_CONTROL_REGS)

/************************
* Function declarations
************************/
void evmI2CInit(void);
#endif //

================

Could you please post your I2C register configurations?

----

Regards

Shankari G

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TMS320C6657: I2C issue