• State Resolved
  • Locked Locked
  • Replies 3 replies
  • Subscribers 98 subscribers
  • Views 474 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

Original question:

AM6442: calculating and inserting ECC on the collected data by DMSS through GPMC

AM6442: How to activate and use "PBIST" and “Bit Multiplexing in Memory Array” in the safety concept of AM64x

Boshra
Intellectual 418 points
Part Number: AM6442

 Hi, 

I am checking the AM64x/AM243x Functional Safety Manual

can you provide me with some information regarding the following concepts that exist on AM64x?

  • “PBIST”
  • “Bit Multiplexing in Memory Array”

I found these two as the possible diagnostics in the safety manual.

The first one seems an engine that is able to do some memory checks and we are able to program it (or at least select the algorithms to be used for the memory check).

The second one seems very interesting and it seems that it’s a HW implementation that makes the bits of a word to be stored at different places, therefore the case of a multiple-bit error will change into a case of multiple single-bit errors. As a result, it can be detected and corrected by ECC.

It seems that these two both are HW implementations. But I didn’t find anything regarding them in the TRM. Like how to activate or use them. I also searched on the TI forum, but still, no information.

Can you help how to activate and use these modules? 

Thanks, 

Boshra

  • 0
    TI__Expert 6880 points

    Hello Boshra,

    Bit Multiplexing in Memory Array is a fault avoidance measure already implemented in hardware and there is nothing for system integrator to do. This feature aids in ECC/parity related diagnostic coverage on memories to improve greatly. But again this is based on fixed hardware implementation of the memories (shown by sram mux factor in the FMEDA rows associated with memories).

     For PBIST, please refer to the SDL documentation on how to enable this. The SDL documentation is available as part of the MCU+ SDK release in ti.com.

    Thanks,

    Neelima

  • 0 in reply to Neelima Muralidharan
    Intellectual 418 points

    Hi Neelima, 

    Thanks for your reply.

    Can you please explain more about "SRAM Mux Factor"? What is it representing? 

    Thanks, 
    Boshra

  • +1 in reply to Boshra
    TI__Expert 6880 points

    SRAM mux factor indicates the physical distance between bits in the same logical word. Such separation is enabled with more physical memories. With such separation, you are reducing the probability of multi bit upsets happening on the same word. We have calculated ECC diagnostic coverage based on mux factor and the FMEDA shows the actual numbers for various mux factors.

    Regards,
    Neelima