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PROCESSOR-SDK-AM64X: GPIO irq affinity

Milan Stevanovic
Intellectual 806 points

Part Number: PROCESSOR-SDK-AM64X

Hi,

 

I am using latest TI SDK release www.ti.com/.../PROCESSOR-SDK-AM64X

 PROCESSOR-SDK-LINUX-RT-AM64X — Processor SDK RT-Linux for AM64x  Version: 09.00.00.03

I have question about IRQ affinity for GPIO...

Currently I did not see any implementation inside TI GPIO kernel driver to support IRQ affinity on GPIO.

Also, by checking TRM for AM64x device, it is not clear is it based per banks and in that case we need to manage GPIO irq affinity per bank

Like this maybe it is possible by using  irq_set_affinity_hint to setup affinity for one bank to specific cpu core during probe

 

Do you have some inputs on this topic? 

Thanks in advance

  • 0
    TI__Guru**** 175761 points

    Hi Milan,

    I don't think the Processor SDK kernel supports setting affinity for GPIO IRQ.

    Can you please provide some details of your use case for using GPIO IRQ affinity?

  • 0 in reply to Bin Liu
    Intellectual 806 points

    Yes by checking code, it is not supported. Project need this as currently all irq for GPIO is to CPU0 only. They want to use irq balance in order to increase performance. I assume irq affinity could be done based per banks with some implementation in SW as I assume gpio bank share one irq line.

    Is this corrcet? Do you plan to support IRQ affinity in future SDK?

      

  • 0 in reply to Milan Stevanovic
    TI__Guru**** 175761 points

    Hi Milan,

    Yes, I believe the irq affinity would be gpio per bank basis.

    We don't have a sw requirement to support gpio irq affinity yet.

    Could you please provide some details about gpio irq scenarios and why irq balance is critical to improve the performance in your use case?

  • 0 in reply to Bin Liu
    Intellectual 806 points

    Hi Bin,

    Thanks for confirmation about gpio bank.

    We still investigate and try to understand this requirement from project who asked for this.

    We know next for now:

    • they have some RT task with highest priority. This task is isolated on CPU1
    • there are two IRQs - one pruss-intc on remoteproc9 and 2 gpio pins with own IRQ and according them, triggered on 1ms rate
    • all these IRQS are now on CPU0 and RT task to manage this is on CPU1 with highest priority

    They want to have this on CPU1 as like this CPU0 will do own "best effort" tasks 

  • 0 in reply to Milan Stevanovic
    TI__Guru**** 175761 points

    Hi Milan,

    Thanks for the details. I understand the use case now.