Dear TI staff,
We are currently debugging our new camera for the am62 EVM board. The target sensor is ox03C and we use GMSL2 SERDES between the sensor and the soc.
We have encountered a problem, the details are as follows:
1. After successfully probing the sensor, we tried to use yavta to check if the data stream works fine. When running yavta directly, it would stuck at 'Start DMA' phase. While running in the background, one frame could be fetched, though 5 frames are asked.
2. We read some of the debug registers such as CSI_IF0_CSI_RX_IF_INTEGRATION_DEBUG, CSI_IF0_CSI_RX_IF_INFO_IRQS, CSI_IF0_CSI_RX_IF_ERROR_DEBUG. The result idicates that data field for an invalid CRC/ECC/Data ID exists.
This seems to be a timing issue, but we don't have appropriate equipment to check the mipi signal yet. So we want to ask for some advice here. Are there any register in the AM62 CSI RX module worth checking in this case? Should we modify the mipi timing in the deserializer to cope with AM62, or in the other way around, change the settings in the csi rx driver?
Thank you for the support in advance and looking forward to some reply.
Huang Jingjie
