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Original question:

AM335x OSC0 Crystal Circuit Load Capacitance

AM3358: AM335x OSC0 Crystal Circuit Load Capacitance

Andrew Norwood
Prodigy 40 points
Part Number: AM3358

Hi,

We are designing a custom board with AM3358 processor. Looking at requirements for OSC0 in Table 6-2 of the AM335x datasheet, there are limits on C1/C2 loading capacitances between 18 and 24pF for a 24MHz crystal. 

Following this, we found a Crystal with 18pF load capacitance, 5pF max shunt capacitance and ESR of 40R (MPN: ECS-240-18-33-JGN-TR)

Using the equation on Note B of Figure 6-9 of AM335x datasheet, this suggests loading capacitance of 26pF which exceeds the specified limit of 24pF:  2*(18pF - 5pF) = 26pF

Looking at BeagleBoneBlack, SanCloud BeagleBone and TI TMDSSK3358 reference designs these all use Crystals with 18pF load capacitance, and use two 18pF capacitors with this. As far as I understand the crystal we have selected should be fine, but I cannot understand how the 18pF used on reference designs has been achieved. 

Please can you advise on the following:

  1. How the original load capacitance values on the TI TMDSSK3358 reference designs were calculated?
  2. If the proposed crystal is acceptable, and if so what capacitors should be used? We understand this may change dependant on layout.

Regards,

Andrew

  • +1
    TI__Guru 62855 points

    The crystal shunt capacitance is in parallel with the series combination of C1 and C2. If the crystal requires a load of 18pf to oscillate at the correct frequency, the formula is saying you subtract the crystal shunt capacitance from the load it expects to determine what external capacitive load needs to be added to reach a load of 18pf. In this case it would be 18pF - 5pf = 13pf. Assuming your PCB traces have zero capacitance, the values for C1 and C2 would need to be 26pf. However, there is a good chance your PCB has 2pf to 3pf of capacitance on each signal trace. You would need to subtract that from the calculated value of 26pf and select a value like 24pf for C1 and C2.

    The datasheet limits are for the combination of the external capacitor plus your PCB trace capacitance. Therefore, a crystal that requires 18pf of load would not be a good choice for this device.

    I'm not sure why the boards you mentioned were designed to use a crystal that requires a load of 18pf. I suspect the TI board was designed before the oscillator limits were defined and the BeagleBone board simply followed the example and used the same crystal. I would not recommend following their example by selecting a crystal that operates outside of the limits defined by the datasheet. 

    Regards,
    Paul

  • 0 in reply to peaves
    Prodigy 40 points

    Thanks for the reply. So we can do maths! We also assumed signal trace was additional to that, which doesn't quite get you to the 18pF figure. But, thanks for confirming we will start with 24pF and then verify the design post layout. 

    As a side note, the 5pF shunt capacitance specified is the maximum value so we could also assume that this will be less, which will require even >26pF (ignoring PCB traces). It seems odd for this MCU to specify such tight capacitance requirements. 

  • 0 in reply to Andrew Norwood
    TI__Guru 62855 points

    For crystals with a shunt capacitance of 5pf or smaller the range of capacitance defined in the datasheet is 12pf to 24pf, which is a 2x range. Why not select a crystal designed for a load of 8pf to 10pf? This would require a capacitance of 16pf to 20pf on each signal trace before considering PCB capacitance. The capacitor value required for this crystal after accounting for the PCB capacitance is likely be in the range of 6pf to 8pf.

    Regards,
    Paul

  • 0 in reply to peaves
    Prodigy 40 points

    Based on your first reply for a Crystal with 8pF load capacitance: 2*(8-5) = 6pF. Assuming 2-3pF is PCB trace capacitance that means the capacitor values need to be ~3pF which is unrealistic and outside the 12pF figure you mentioned (unless I am misunderstanding). Hence I think better to stick with the first option. Thanks.