J721S2XSOMXEVM: How to use timer of main domain in mcu2_1

hi bingxian,

This is taken care in the API TimerP_updateDefaultInfoTbl, in the same file. This API changes to Main Domain Timer for main domain R5F. 

Regards,

Brijesh

hi Brijesh

When I created the timer 2 for the MAIN domain via TimerP_create, the variable intfreqLo of the structure TimerP_Params was set to 19.2MHZ, and the timer did not produce an interrupt. But when I set intfreqLo to 200MHZ, the timer can generate interrupts. How can you determine the value that the intfreqLo variable can set?

Regards,

bingxian

Hi Bingxian,

Which timer are you using? May be the timer input clock is not correct. are you using SBL boot flow? Because in SBL bootflow, SBL sets up the timer clock for few timers. 

Ideally timer input clock should be set explicitly using sciclient somewhere in the boot flow, so that the value is always correct.. 

Regards,

Brijesh 

hi Brijesh

I use timer2 from the MAIN domain and use SBL boot flow

In which C file of the SBL is the timer clock initialized?

How do i know how many input clock a timer supports?

Regards,

bingxian

Hi Bingxian,

Can you please check in below file?

ti-processor-sdk-rtos-j721s2-evm-08_06_00_11\pdk_j721s2_08_06_00_31\packages\ti\board\src\j721s2_evm\board_clock.c 

Can you also read the control module register for the timer2 clock at the offset 0x00108108h ?

Regards,

Brijesh

hi Brijesh

The register address 0x00108108h has a value of 0x0, so I know that the clock input is WKUP_HFOSC0_CLKOUT, but how do I determine how many clock frequencies WKUP_HFOSC0_CLKOUT can support?

Regards,

bingxian