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J721S2XSOMXEVM: How to use timer of main domain in mcu2_1

bingxian lu
Intellectual 570 points
Part Number: J721S2XSOMXEVM

Hi,

SDK: 8.6      CORE:MCU2_1

We need to build a timer in MCU2_1 that can be accurate to 50us.

Since the timer resources in the MCU domain are limited, we want to use the timer in the MAIN domain to implement the 50us timer

But I found that TimerP_create function could not select the timer of MAIN domain as timerID. The reason is that MCU2_1 runtime defines BUILD_MCU, when we pass timerID through TimerP_create, In the PDK/packages/ti/osal/soc/j721s2 / TimerP_default c array under gDmTimerPInfoTbl always choose timerID is MCU domain

How can I implement 50us timer in MCU2_1 using MAIN domain timer?

Regards,

bingxian

  • 0
    TI__Guru**** 452215 points

    hi bingxian,

    This is taken care in the API TimerP_updateDefaultInfoTbl, in the same file. This API changes to Main Domain Timer for main domain R5F. 

    Regards,

    Brijesh

  • 0 in reply to Brijesh Jadav
    Intellectual 570 points

    hi Brijesh

    When I created the timer 2 for the MAIN domain via TimerP_create, the variable intfreqLo of the structure TimerP_Params was set to 19.2MHZ, and the timer did not produce an interrupt. But when I set intfreqLo to 200MHZ, the timer can generate interrupts. How can you determine the value that the intfreqLo variable can set?

    Regards,

    bingxian

  • 0 in reply to bingxian lu
    TI__Guru**** 452215 points

    Hi Bingxian,

    Which timer are you using? May be the timer input clock is not correct. are you using SBL boot flow? Because in SBL bootflow, SBL sets up the timer clock for few timers. 

    Ideally timer input clock should be set explicitly using sciclient somewhere in the boot flow, so that the value is always correct.. 

    Regards,

    Brijesh 

  • 0 in reply to Brijesh Jadav
    Intellectual 570 points

    hi Brijesh

    I use timer2 from the MAIN domain and use SBL boot flow

    In which C file of the SBL is the timer clock initialized?

    How do i know how many input clock a timer supports?

    Regards,

    bingxian

  • 0 in reply to bingxian lu
    TI__Guru**** 452215 points

    Hi Bingxian,

    Can you please check in below file?

    ti-processor-sdk-rtos-j721s2-evm-08_06_00_11\pdk_j721s2_08_06_00_31\packages\ti\board\src\j721s2_evm\board_clock.c 

    Can you also read the control module register for the timer2 clock at the offset 0x00108108h ?

    Regards,

    Brijesh

  • 0 in reply to Brijesh Jadav
    Intellectual 570 points

    hi Brijesh

    The register address 0x00108108h has a value of 0x0, so I know that the clock input is WKUP_HFOSC0_CLKOUT, but how do I determine how many clock frequencies WKUP_HFOSC0_CLKOUT can support?

    Regards,

    bingxian

  • +1 in reply to bingxian lu
    TI__Guru**** 452215 points

    Hi BingXian,

    But this means the Timer2 is clocked with 19.2MHz clock input ie the input clock to the SoC. isn't it? or whatever the input clock is to the SoC?

    Regards,

    Brijesh