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PROCESSOR-SDK-J721S2: How do MCU2_1 register MAIN domain GPIO interrupts

Part Number: PROCESSOR-SDK-J721S2

Hi,

I build MCU2_1 code in a directory vision_apps/platform/j721s2 / rtos / mcu2_1

The boot mode is the SBL mode

Under the above conditions, I want to interrupt the registration of GPIO0_16. Is there any code that can be referenced?

Does MCU2_1 register GPIO0_16 interrupt also need to use Sciclient_rmIrqSet for interrupt routing?

I can't register the interrupt now. Can I provide my interrupt registration code? Could TI experts help me check my code?

SDK 8.6   CORE MCU2_1

BRs

bingxian

  • Hi, Parth

    I wrote my code according to the documentation and noticed that when Sciclient_rmIrqSet was called, there was an error (-1 was returned).

    The code looks like this:

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    struct tisci_msg_rm_irq_set_req rmIrqReq;
    struct tisci_msg_rm_irq_set_resp rmIrqResp;
    struct tisci_msg_rm_get_resource_range_resp res = {0};
    struct tisci_msg_rm_get_resource_range_req req = {0};
    uint16_t intNum;
    req.type = TISCI_DEV_GPIOMUX_INTRTR0;
    req.secondary_host = TISCI_MSG_VALUE_RM_UNUSED_SECONDARY_HOST;
    retVal = Sciclient_rmGetResourceRange(&req,
    &res,
    SCICLIENT_SERVICE_WAIT_FOREVER);
    appLogPrintf("Sciclient_rmGetResourceRange retval = %d\n",retVal);
    for(uint16_t irIntrIdx = res.range_start; irIntrIdx < res.range_start+res.range_num; irIntrIdx++)
    {
    retVal = Sciclient_rmIrqTranslateIrOutput(req.type,
    irIntrIdx,
    TISCI_DEV_R5FSS0_CORE1,
    &intNum);
    XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX

    The output is as follows:

    BRs

    bingxian

  • Hello,

    Our engineer (Parth) is currently out of the office. Please expect a day delay in response.

    Thanks.

  • Hi,

    Is there any update on this issue?

    BRs

    bingxian

  • Hi bingxian,

    Is this issue still open?

    Thanks,

    Neehar

  • Hi, Neehar

    Yes, the problem is still open

    BRs

    bingxian

  • Hi Bingxian,

    Additionally, please refer to this FAQ for interrupt setup specifically for GPIO.

    Thanks,

    Neehar