LP-AM263: RMII2_REF_CLK as the RMII reference clock

Hii Francois,

As per the TRM, we can use the RMII2_REF_CLK signal (ball K15) as the RMII reference clock but it is 50MHz clock. It is mentioned in 13.2.1.2.2 CPSW0 RMII Interface, The CPSW0 module integrated in the device supports internal and external clock sources in RMII mode. In the figure 13-93 in TRM, internal clock source for  RMII_MHZ_50_CLK clock is 50 MHz clock source that is provided on the CLKOUT0 device pin. This clock has to be routed on the PCB to the RMII_REF_CLK device pin and the external PHY, RMII clock input.

And Figure 13-94 shows the external clock source for RMII_MHZ_50_CLK clock. In this case a 50 MHz clock is available on the PCB and it can be sourced from an oscillator or from the Ethernet PHY. This externally generated clock should be routed to both RMII_REF_CLK device pin and the external PHY, RMII clock input.

RMII_REF_CLK is RMII 50MHz reference clock.

This is theoretical view, not experimentally validated.

There are some PHYs do support this scheme for example DP83848. There is a CLOCK_OUT pin, in MII mode, this pin provides a 25 MHz clock output to the system. In RMII mode, this pin provides a 50 MHz clock output to the system. This allows other devices to use the reference clock from the DP83848VYB without requiring additional clock sources.

I hope this information helps you.

Best regards,

Narayanarao Puli