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DM6446 VPBE enabling and register access problems

HvW
Prodigy 140 points


Hi,

I am trying to get the VPBE of the DM6446 working, but without any success. I have loaded a Bitmap image into DDR and configured its start address in DDR as the Window start address. I enable all the clocks (as I have read in other forum posts) but absolutely no HS or VS outputs occur.

The VPBE is configured for YCC16 and a 27MHz signal is applied to the VPBE_CLK.

It also seems as though the VPBE register do not get configured with the values I provide because I can't see that the VENC register values change as I step through my configuration code.

What needs to happen before the VPBE registers can be accessed. I am trying to access these registers via the ARM core, the DSP is entirely turned off. Is this okay or should the DSP handle the VPBE?

Thanks,

Herman

  • 0
    TI__Expert 4685 points

    HvW,

    I believe DSP can be off to use VPBE. That should not be problem.

    Apart from that, Please give us more details. Which operating system you are using? What are the video parameters(height, width, standard)? If you are using SDK, it should have kernel image and appropriate sample/demo applications.  You might wan to try what comes with SDK.

  • 0 in reply to Nagabhushana
    Prodigy 140 points

    Hi,

    I am not using an operating system, it is C code only. I am busy with a BSP for a custom board.

    All the video related registers' (VPSS, VPBE and VPFE) values are zero, and I am unavble to change them via the emulator. Other peripherals such as UART contain the values I expect. 

    Can it be because of the power controller not being set up properly for video operation? If so, what must this setting be?

    I have the SDK, but the disc contents I have do not contain example code of how it was done. There are only large binary files. Where can I get example code of how it was done on the SDK?

    Thanks,

    Herman

  • 0 in reply to HvW
    TI__Expert 4685 points

    If you have not enabled clocks related to video blocks, you cant update registers. Please check that.

    You can refer to arago repository to understand how the registers are configured on linux - http://arago-project.org/git/projects/?p=linux-davinci.git;a=shortlog;h=refs/heads/r37

    I was refering to v4l2 examples here(arago) -  http://arago-project.org/git/projects/?p=linux-davinci.git;a=shortlog;h=refs/heads/r37

  • 0 in reply to Nagabhushana
    Prodigy 140 points

    Hi,

    I seem to have a problem with the SYSCLK1: Here is the register dump:

    SYSTAT = 0x0000001E

    _RESV = 0x0

    SYS8ON = OFF (0x0)

    SYS7ON = OFF (0x0)

    SYS6ON = OFF (0x0)

    SYS5ON = ON (0x1)

    SYS4ON = ON (0x1)

    SYS3ON = ON (0x1)

    SYS2ON = ON (0x1)

    SYS1ON = OFF (0x0)

    From the ARM reference manual it is specified that the VPSS is clocked via PLL2 SYSCLK1, but as you can see from the register dump, SYSCLK1 is off. In my code I do enable SYSCLK1 along with SYSCLK2 by enabling their dividers. Do you have any idea what else can cause this clock to be forced off?
    Thanks,
    Herman 

  • 0 in reply to HvW
    Prodigy 140 points

    Hi,

    I am able to write to the VPBE registers now. This occurred after enabling the VPSS as slave in the PSC and not as master. 

    I don't know what this means though, does this have something to do with this bus priority?

    Thanks,

    Herman