Hello,
I am trying to connect an external SPI device to the J784S4XEVM by getting main_spi5 working on the J26 expansion pin header. This header is specifically for breaking out a main domain SPI port to physical pins so I assume it should relatively straight forward to enable this but I am running into multiple issues.
I have started by just trying to bring up main_spi5 as a spidev device to run a loopback test before trying to get the actual spi device working.
I am using this SDK: ti-processor-sdk-linux-adas-j784s4-evm-09_00_01_02
Here are the modifications I have made to the k3-j784s4-evm.dts file:
diff --git a/J784S4-EVM/kernel/k3-j784s4-evm.dts b/J784S4-EVM/kernel/k3-j784s4-evm.dts
index b2970e9..18dc1a1 100644
--- a/J784S4-EVM/kernel/k3-j784s4-evm.dts
+++ b/J784S4-EVM/kernel/k3-j784s4-evm.dts
@@ -10,6 +10,7 @@
#include <dt-bindings/net/ti-dp83867.h>
#include <dt-bindings/gpio/gpio.h>
#include "k3-j784s4.dtsi"
+#include <dt-bindings/interrupt-controller/irq.h>
+ spi0 = &main_spi5;
};
memory@80000000 {
@@ -641,6 +643,22 @@
J784S4_IOPAD(0x024, PIN_OUTPUT, 0) /* (AH34) MCAN16_TX */
>;
};
+
+ main_spi5_pins_default: main_spi5_pins_default {
+ pinctrl-single,pins = <
+ J784S4_IOPAD(0x07c, PIN_INPUT, 8) /* (AJ38) MCASP0_AXR3.SPI5_CLK */
+ J784S4_IOPAD(0x068, PIN_INPUT, 8) /* (AE38) MCAN0_RX.SPI5_CS0 */
+ J784S4_IOPAD(0x064, PIN_INPUT, 8) /* (AF38) MCAN0_TX.SPI5_CS1 */
+ J784S4_IOPAD(0x070, PIN_INPUT, 8) /* (AH38) MCAN1_RX.SPI5_D0 */
+ J784S4_IOPAD(0x088, PIN_INPUT, 11) /* (AF36) MCASP0_AXR6.SPI5_D1 */
+ >;
+ };
+
+ j36_header_gpio0_pins_default: j36_header_gpio0_pins_default {
+ pinctrl-single,pins = <
+ J784S4_IOPAD(0x084, PIN_INPUT, 7) /* (AG38) MCASP0_AXR5.GPIO0_33 */
+ >;
+ };
};
&wkup_pmx0 {
@@ -976,6 +994,8 @@
&main_gpio0 {
status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&j36_header_gpio0_pins_default>;
};
&mcu_cpsw {
@@ -1470,3 +1490,27 @@
pinctrl-0 = <&main_mcan16_pins_default>;
phys = <&transceiver3>;
};
+
+&main_spi5 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&main_spi5_pins_default>;
+ status="okay";
+
+ spidev@0 {
+ spi-max-frequency = <24000000>;
+ reg = <0>;
+ compatible = "linux,spidev";
+ };
+
+ // icm42688@0 {
+ // compatible = "invensense,icm42688";
+ // reg = <0>;
+ // spi-max-frequency = <24000000>;
+ // spi-cpha;
+ // spi-cpol;
+ // interrupt-parent = <&main_gpio0>;
+ // interrupts = <33 IRQ_TYPE_EDGE_RISING>;
+ // vdd-supply = <&vdd_sd_dv>;
+ // vddio-supply = <&vdd_sd_dv>;
+ // };
+};
\ No newline at end of fileHere are the linux modules I am include on top of the default defconfig:
diff --git a/J784S4-EVM/kernel/defconfig b/J784S4-EVM/kernel/defconfig index 75a1e86..fc74d20 100644 --- a/J784S4-EVM/kernel/defconfig +++ b/J784S4-EVM/kernel/defconfig @@ -575,7 +575,11 @@ CONFIG_SPI_IMX=m CONFIG_SPI_FSL_DSPI=y CONFIG_SPI_MESON_SPICC=m CONFIG_SPI_MESON_SPIFC=m -CONFIG_SPI_OMAP24XX=m +CONFIG_REGMAP_SPI=y +CONFIG_SPI_DYNAMIC=y +CONFIG_SPI_MEM=y +CONFIG_SPI_OMAP24XX=y +CONFIG_SND_SOC_I2C_AND_SPI=y CONFIG_SPI_ORION=y CONFIG_SPI_PL022=y CONFIG_SPI_ROCKCHIP=y @@ -589,7 +593,7 @@ CONFIG_SPI_SH_MSIOF=m CONFIG_SPI_SUN6I=y CONFIG_SPI_TEGRA210_QUAD=m CONFIG_SPI_TEGRA114=m -CONFIG_SPI_SPIDEV=m +CONFIG_SPI_SPIDEV=y CONFIG_SPI_SLAVE=y CONFIG_SPMI=y CONFIG_PINCTRL_MAX77620=y @@ -1012,6 +1016,12 @@ CONFIG_USB_CDC_COMPOSITE=m CONFIG_USB_G_SERIAL=m CONFIG_USB_G_MULTI=m CONFIG_USB_G_MULTI_CDC=y +CONFIG_USB_NET_RNDIS_HOST=m +CONFIG_USB_F_RNDIS=m +CONFIG_USB_CONFIGS_RNDIS=y +CONFIG_USB_ETH_RNDIS=y +CONFIG_USB_FUNCTIONFS_RNDIS=y +CONFIG_USB_G_MULTI_RNDIS=y CONFIG_TYPEC=m CONFIG_TYPEC_TCPM=m CONFIG_TYPEC_TCPCI=m @@ -1291,6 +1301,21 @@ CONFIG_EXTCON_USBC_CROS_EC=y CONFIG_OMAP_GPMC=y CONFIG_RENESAS_RPCIF=m CONFIG_IIO=y +CONFIG_IIO_BUFFER=y +CONFIG_IIO_BUFFER_CB=y +CONFIG_IIO_BUFFER_DMA=y +CONFIG_IIO_BUFFER_DMAENGINE=y +CONFIG_IIO_BUFFER_HW_CONSUMER=y +CONFIG_IIO_KFIFO_BUF=y +CONFIG_IIO_TRIGGERED_BUFFER=y +CONFIG_IIO_CONFIGFS=y +CONFIG_IIO_TRIGGER=y +CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 +CONFIG_IIO_SW_DEVICE=y +CONFIG_IIO_SW_TRIGGER=y +CONFIG_IIO_TRIGGERED_EVENT=y +CONFIG_INV_ICM42600_SPI=m +CONFIG_IIO_INTERRUPT_TRIGGER=y CONFIG_EXYNOS_ADC=y CONFIG_MAX9611=m CONFIG_QCOM_SPMI_VADC=m
I see the spi in question in /sys/class/spi_master so I think the device tree isn’t entirely wrong:
root@j784s4-evm:~# ls -l /sys/class/spi* /sys/class/spi_master: total 0 lrwxrwxrwx 1 root root 0 Oct 30 2022 spi0 -> ../../devices/platform/bus@100000/2150000.spi/spi_master/spi0 lrwxrwxrwx 1 root root 0 Oct 30 2022 spi1 -> ../../devices/platform/bus@100000/bus@100000:bus@28380000/47000000.bus/47040000.spi/spi_master/spi1 lrwxrwxrwx 1 root root 0 Oct 30 2022 spi2 -> ../../devices/platform/bus@100000/bus@100000:bus@28380000/47000000.bus/47050000.spi/spi_master/spi2 /sys/class/spi_slave: total 0 /sys/class/spidev: total 0
However, it does not show up as a spidev device in /dev or /sys/class.
The other issue I am having is with configuring the muxes on the board to switch the SPI5 pins to the J26 expansion header.
I tried just configuring the pins on J26 as GPIO to test if I have the muxes configured correctly. I can toggle the pins in sysfs but I do not see the voltage on the physical pins change so I suspect there is something wrong with my muxing.
I am trying to configure the muxes as such:
Since CANUART_MUX_SEL2 is tied to 3V3 and CANUART_MUX_SEL0 is from a DIP switch, I only need to set CANUART_MUX1/2_SEL1 to L:
Configuring the 3 mux pins to H L H I am just toggling the two selector pins (P16 and P17) on the gpiochip472 (which I have confirmed with the i2c address is the Expander2).
echo 488 > /sys/class/gpio/export echo 489 > /sys/class/gpio/export echo out > /sys/class/gpio/gpio488/direction echo out > /sys/class/gpio/gpio489/direction echo 0 > /sys/class/gpio/gpio488/value echo 0 > /sys/class/gpio/gpio489/value
However, I see no change in the behavior of the pins on J26 when I toggle the two mux pins.
If anyone has any experience with either of these two things or has gotten the SPI working on J26 it would be much appreciated.
Thanks,
Devin
