AM5748: Processors forum

Hi Team,

I am currently working on DSP1 in the AM5748 platform, and we are encountering a DDR memory issue during debugging via JTAG. Specifically, when attempting to modify the value of a global variable using the expression window in the debugger, the variable's value does not seem to update. However, upon inspection using the memory browser, the value is modified.

For example:

uint32_t enable_neptune_debug = 1;

void main()
{
   while (enable_neptune_debug);
   .

.
}

In this scenario, trying to change the value of enable_neptune_debug to0 through the expression window does not result in the expected change.

Interestingly, when running DSP1 without JTAG, all memory operations function as expected.

We are seeking assistance in diagnosing and resolving this issue promptly. Your expertise and guidance in this matter would be highly appreciated.

Below is the code of .bld file

/*
 *  ======== config.bld ========
 *
 */
var Build = xdc.useModule('xdc.bld.BuildEnvironment');

/*  Memory Map for ti.platforms.evmDRA7XX:dsp1 and ti.platforms.evmDRA7XX:dsp2
 *
 *  --- External Memory ---
 *  Virtual     Physical        Size            Comment
 *  ------------------------------------------------------------------------
 *  9500_4000   ????_????    10_0000  (  ~1 MB) EXT_CODE
 *  9510_0000   ????_????    10_0000  (   1 MB) EXT_DATA
 *  9520_0000   ????_????    30_0000  (   3 MB) EXT_HEAP
 *  9F00_0000   9F00_0000     6_0000  ( 384 kB) TRACE_BUF
 *  9F06_0000   9F06_0000     1_0000  (  64 kB) EXC_DATA
 *  9F07_0000   9F07_0000     2_0000  ( 128 kB) PM_DATA (Power mgmt)
 */
var evmDRA7XX_ExtMemMapDsp = {
    EXT_CODE: {
        name: "EXT_CODE",
        base: 0x95000000,
        len:  0x00100000,
        space: "code",
        access: "RWX"
    },
        DDR: {
        name: "DDR",
        base: 0x95100000,
        len:  0x00300000,
        space: "data",
        access: "RW"
    },
        EXT_HEAP: {
        name: "EXT_HEAP",
        base: 0x95400000,
        len:  0x00300000,
        space: "data",
        access: "RW"
    },
    TDD_SWI_DATA: {
        name: "TDD_SWI_DATA",
        base: 0x95700000,
        len:  0x00200000,
        space: "data",
        access: "RW"
    },
 /*   DDR: {
        name: "DDR",
        base: 0x95700000,
        len:  0x00300000,
        space: "data",
        access: "RW"
    },*/
    
    TRACE_BUF: {
        name: "TRACE_BUF",
        base: 0x9F000000,
        len:  0x00060000,
        space: "data",
        access: "RW"
    },
    EXC_DATA: {
        name: "EXC_DATA",
        base: 0x9F060000,
        len:  0x00010000,
        space: "data",
        access: "RW"
    },
    PM_DATA: {
        name: "PM_DATA",
        base: 0x9F070000,
        len:  0x00020000,
        space: "data",
        access: "RWX"  /* should this have execute perm? */
    },
};

Build.platformTable["ti.platforms.evmDRA7XX:dsp1"] = {
    externalMemoryMap: [
        [ "EXT_CODE", evmDRA7XX_ExtMemMapDsp.EXT_CODE ],
        [ "DDR", evmDRA7XX_ExtMemMapDsp.DDR ],
        [ "EXT_HEAP", evmDRA7XX_ExtMemMapDsp.EXT_HEAP ],
        [ "TDD_SWI_DATA", evmDRA7XX_ExtMemMapDsp.TDD_SWI_DATA ],        
      //  [ "DDR", evmDRA7XX_ExtMemMapDsp.DDR ],
        [ "TRACE_BUF", evmDRA7XX_ExtMemMapDsp.TRACE_BUF ],
        [ "EXC_DATA", evmDRA7XX_ExtMemMapDsp.EXC_DATA ],        
        [ "PM_DATA", evmDRA7XX_ExtMemMapDsp.PM_DATA ],
    ],
    codeMemory: "EXT_CODE",
    dataMemory: "DDR",
    stackMemory: "DDR",

};

Below is the code of .cfg file

// Relocating sections to apprpriate memory type

Program.sectMap[".switch"] 	= "DDR";
Program.sectMap[".sysmem"] 	= "DDR";
Program.sectMap[".stack"] 	= "L2SRAM";
Program.sectMap[".cio"] 	= "DDR";
Program.sectMap[".vecs"] 	= "DDR";
Program.sectMap[".fardata"] = "DDR";
Program.sectMap[".const"] 	= "DDR";
Program.sectMap[".args"] 	= "DDR";
Program.sectMap["xdc.meta"] = "DDR";
Program.sectMap[".text"] 	= "DDR";
Program.sectMap[".far"] 	= "DDR";
Program.sectMap[".data"] 	= "DDR";
Program.sectMap[".cinit"] 	= "DDR";
Program.sectMap[".pinit"] 	= "DDR";   
// allocation for .bss .neardata & .rodata must be same
Program.sectMap[".bss"] 	= "DDR";  
Program.sectMap[".neardata"]= "DDR";
Program.sectMap[".rodata"] 	= "DDR";

//Program.sectMap[".ti.decompress"] 			= "IRAM";
Program.sectMap[".far:taskStackSection"] 	= "DDR";
Program.sectMap[".fardata:.edma3Globals"] 	= "DDR";
Program.sectMap[".far:local"] 				= "DDR";

Program.sectMap[".TX_DATA_BUF_Section"] 	= "DDR";
Program.sectMap[".FPGA_FIFO_Section"] 		= "DDR";
Program.sectMap[".GLOBAL_STRUCTS"] 			= "DDR";
Program.sectMap[".version"] 				= "DDR";

Program.sectMap["systemHeap"] = Program.platform.stackMemory;
Program.sectMap["systemHeap"] = Program.platform.dataMemory;
Program.sectMap["systemHeap"] = "L2SRAM"; //Program.sectMap["systemHeap"] = "IRAM";

//Program.sectMap[".mcbsp"] 	= "DDR";       //mcbsp !@#$
//Program.sectMap[".mcbspSharedMem"] 		= "DDR";     //mcbsp !@#$
Program.sectMap[".csl_vect"] 		= "DDR";

Program.sectMap[".scratchMem3"] = "DDR";  //IRAM
Program.sectMap[".scratchMem2"] = "DDR";  //IRAM
Program.sectMap[".scratchMem"] 	= "L2SRAM";  //IRAM
Program.sectMap[".Softtable"] 	= "L2SRAM";  //IRAM

/* IPC packages */
Program.sectMap[".section_DDR"]   =   "DDR";
Program.sectMap[".tracebuf"] = "TRACE_BUF";
Program.sectMap[".errorbuf"] = "EXC_DATA";

Program.sectMap["BOARD_IO_DELAY_DATA"] 		= "OCMC_RAM1";
Program.sectMap["BOARD_IO_DELAY_CODE"] 		= "OCMC_RAM1";
Program.sectMap[".tdd_swi_data"]		 	= "TDD_SWI_DATA"; 
Program.sectMap[".McASP_buffer_data"]		 	= "L2SRAM"; 



/* ================ Logger configuration ================ */
/*  The target's Log records are read while the target is running. Note: this mode
 *  is only supported for CPUs that support real-time JTAG accesses such as
 *  those in the C6X family (e.g. C64X+ and C66 CPUs). 
 *
 *  Configuration done by the application is still honored (e.g. setting
 *  up the common$.diags mask).
 *
 *  Please refer to the ti.uia.sysbios.LoggingSetup module for more
 *  details and configuration options.
 */

/* default LoggingSetup configuration*/
LoggingSetup.loggerType 				= LoggingSetup.LoggerType_STOPMODE;
LoggingSetup.loadLoggerSize 			= 1024;
LoggingSetup.mainLoggerSize 			= 0xA000;
LoggingSetup.sysbiosLoggerSize 			= (64*1024);
LoggingSetup.multicoreEventCorrelation 	= false;
LoggingSetup.memorySectionName  		= "DDR";
	
/* enable event logging for SYS/BIOS Swi and Hwi threads */
LoggingSetup.sysbiosTaskLogging 		= true;
LoggingSetup.sysbiosSwiLogging 			= true;
LoggingSetup.sysbiosHwiLogging 			= true;
	
/* Enable CPU Load logging */
LoggingSetup.loadLogging 				= true;
	
/*
*  Enable Task, Swi, and Hwi Load logging. This allows the Idle Task
*  usage to make more sense. Otherwise Hwi and Swi load is factored into
*  each task's usage. */

LoggingSetup.loadTaskLogging 			= true;
LoggingSetup.loadSwiLogging 			= true;
LoggingSetup.loadHwiLogging 			= true;

/* Create and install logger for the whole system */
var loggerBufParams = new LoggerBuf.Params();
loggerBufParams.numEntries = 48;
Defaults.common$.logger = LoggerBuf.create(loggerBufParams);

/* system logger */
var LoggerSys = xdc.useModule('xdc.runtime.LoggerSys');
var LoggerSysParams = new LoggerSys.Params();
Defaults.common$.logger = LoggerSys.create(LoggerSysParams);

/*
 *  ======== Instrumentation Configuration ========
 */

/* enable runtime Diags_setMask() for non-XDC spec'd modules */
Diags.setMaskEnabled = true;

/* override diags mask for selected modules */
Main.common$.diags_INFO = Diags.ALWAYS_ON;
Diags.setMaskMeta("xdc.runtime.Main",
    Diags.ENTRY | Diags.EXIT | Diags.INFO, Diags.RUNTIME_ON);
    
Registry.common$.diags_ENTRY = Diags.RUNTIME_OFF;
Registry.common$.diags_EXIT  = Diags.RUNTIME_OFF;
Registry.common$.diags_INFO  = Diags.RUNTIME_OFF;
Registry.common$.diags_USER1 = Diags.RUNTIME_OFF;
Registry.common$.diags_LIFECYCLE = Diags.RUNTIME_OFF;
Registry.common$.diags_STATUS = Diags.RUNTIME_OFF;


Main.common$.diags_ASSERT = Diags.ALWAYS_ON;
Main.common$.diags_INTERNAL = Diags.ALWAYS_ON;

Thanks, and Regards

Yashwanth T L