Part Number: J784S4XEVM
SDK版本：ti-processor-sdk-rtos-j784s4-evm-09_00_00_02
运行指令： ti_dl/utils/tidlModelImport/out/tidl_model_import.out ../../test/testvecs/config/import/public/onnx/ tidl_import_yoloV5_384.txt
终端信息：
TIDL Meta PipeLine (Proto) File : ../../test/testvecs/models/public/onnx/yolov5s6_384_ti_lite_metaarch.prototxt
yolo_v3
yolo_v3
ONNX Model (Proto) File : ../../test/testvecs/models/public/onnx/yolov5s6_384_ti_lite_32p8_51p2.onnx
TIDL Network File : ../../test/testvecs/config/tidl_models/onnx/yolov5_384/tidl_net_yolo5_384.bin
TIDL IO Info File : ../../test/testvecs/config/tidl_models/onnx/yolov5_384/tidl_io_yolo5_384_
Current ONNX OpSet Version : 11
Empty prototxt path, running calibration
~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~
Processing config file #0 : /home/csoft/ti-processor-sdk-rtos-j784s4-evm-09_00_00_02/c7x-mma-tidl/ti_dl/test/testvecs/config/tidl_models/onnx/yolov5_384/tidl_import_yoloV5_384.txt.qunat_stats_config.txt
Illegal instruction (core dumped)
***************** Calibration iteration number 0 started ************************
~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~
Processing config file #0 : /home/csoft/ti-processor-sdk-rtos-j784s4-evm-09_00_00_02/c7x-mma-tidl/ti_dl/test/testvecs/config/tidl_models/onnx/yolov5_384/tidl_import_yoloV5_384.txt.qunat_stats_config.txt
Illegal instruction (core dumped)
***************** Calibration iteration number 0 completed ************************
------------------ Network Compiler Traces -----------------------------
NC running for device: 1
Running with OTF buffer optimizations
successful Memory allocation
INFORMATION: [TIDL_ResizeLayer] Resize_107 Any resize ratio which is power of 2 and greater than 4 will be placed by combination of 4x4 resize layer and 2x2 resize layer. For example a 8x8 resize will be replaced by 4x4 resize followed by 2x2 resize.
INFORMATION: [TIDL_ResizeLayer] Resize_123 Any resize ratio which is power of 2 and greater than 4 will be placed by combination of 4x4 resize layer and 2x2 resize layer. For example a 8x8 resize will be replaced by 4x4 resize followed by 2x2 resize.
INFORMATION: [TIDL_ResizeLayer] Resize_139 Any resize ratio which is power of 2 and greater than 4 will be placed by combination of 4x4 resize layer and 2x2 resize layer. For example a 8x8 resize will be replaced by 4x4 resize followed by 2x2 resize.
TIDL ALLOWLISTING LAYER CHECK: TIDL_E_QUANT_STATS_NOT_AVAILABLE] tidl_quant_stats_tool.out fails to collect dynamic range. Please look into quant stats log. This model will get fault on target.
****************************************************
** 3 WARNINGS 1 ERRORS **
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配置文件（tidl_import_yoloV5_384.txt）
modelType = 2
numParamBits = 8
numFeatureBits = 8
quantizationStyle = 3
#quantizationStyle = 2
inputNetFile = "../../test/testvecs/models/public/onnx/yolov5s6_384_ti_lite_32p8_51p2.onnx"
outputNetFile = "../../test/testvecs/config/tidl_models/onnx/yolov5_384/tidl_net_yolo5_384.bin"
outputParamsFile = "../../test/testvecs/config/tidl_models/onnx/yolov5_384/tidl_io_yolo5_384_"
inDataNorm = 1
inMean = 0 0 0
inScale = 0.003921568627 0.003921568627 0.003921568627
inDataFormat = 1
inWidth = 384
inHeight = 384
inNumChannels = 3
numFrames = 1
inData = "../../test/testvecs/config/detection_list.txt"
perfSimConfig = ../../test/testvecs/config/import/device_config.cfg
inElementType = 0
#outDataNamesList = "convolution_output,convolution_output1,convolution_output2"
metaArchType = 4
metaLayersNamesList = "../../test/testvecs/models/public/onnx/yolov5s6_384_ti_lite_metaarch.prototxt"
postProcType = 2
在执行运行指令时，出现TIDL ALLOWLISTING LAYER CHECK: TIDL_E_QUANT_STATS_NOT_AVAILABLE] tidl_quant_stats_tool.out fails to collect dynamic range. Please look into quant stats log. This model will get fault on target.怎么解决？
